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Merge branch 'master' into esp32p4_new2
Signed-off-by: Vincent1-python <pywei201209@163.com>
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.github/workflows/ports_zephyr.yml

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- uses: jlumbroso/free-disk-space@main
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with:
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# Only free up a few things so this step runs quickly.
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# (android would save 9.6GiB, but takes about 13m)
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# (large-packages would save 4.6GiB, but takes about 3m)
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android: false
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dotnet: true
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haskell: true
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large-packages: false
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docker-images: false
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tool-cache: true
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swap-storage: false
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- uses: actions/checkout@v5
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- id: versions

README.md

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@@ -98,28 +98,74 @@ development and testing of MicroPython itself, as well as providing
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lightweight alternative to CPython on these platforms (in particular on
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embedded Linux systems).
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The ["minimal"](ports/minimal) port provides an example of a very basic
102-
MicroPython port and can be compiled as both a standalone Linux binary as
103-
well as for ARM Cortex M4. Start with this if you want to port MicroPython to
104-
another microcontroller. Additionally the ["bare-arm"](ports/bare-arm) port
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is an example of the absolute minimum configuration, and is used to keep
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track of the code size of the core runtime and VM.
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108-
In addition, the following ports are provided in this repository:
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- [cc3200](ports/cc3200) -- Texas Instruments CC3200 (including PyCom WiPy).
110-
- [esp32](ports/esp32) -- Espressif ESP32 SoC (including ESP32S2, ESP32S3, ESP32C3, ESP32C6).
111-
- [esp8266](ports/esp8266) -- Espressif ESP8266 SoC.
112-
- [mimxrt](ports/mimxrt) -- NXP m.iMX RT (including Teensy 4.x).
113-
- [nrf](ports/nrf) -- Nordic Semiconductor nRF51 and nRF52.
114-
- [pic16bit](ports/pic16bit) -- Microchip PIC 16-bit.
115-
- [powerpc](ports/powerpc) -- IBM PowerPC (including Microwatt)
116-
- [qemu](ports/qemu) -- QEMU-based emulated target (for testing)
117-
- [renesas-ra](ports/renesas-ra) -- Renesas RA family.
118-
- [rp2](ports/rp2) -- Raspberry Pi RP2040 (including Pico and Pico W).
119-
- [samd](ports/samd) -- Microchip (formerly Atmel) SAMD21 and SAMD51.
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- [stm32](ports/stm32) -- STMicroelectronics STM32 family (including F0, F4, F7, G0, G4, H7, L0, L4, WB)
121-
- [webassembly](ports/webassembly) -- Emscripten port targeting browsers and NodeJS.
122-
- [zephyr](ports/zephyr) -- Zephyr RTOS.
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Over twenty different MicroPython ports are provided in this repository,
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split across three
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[MicroPython Support Tiers](https://docs.micropython.org/en/latest/develop/support_tiers.html).
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105+
Tier 1 Ports
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============
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108+
👑 Ports in [Tier 1](https://docs.micropython.org/en/latest/develop/support_tiers.html)
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are mature and have the most active development, support and testing:
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| Port | Target | Quick Reference |
112+
|--------------------------|----------------------------------------------------------------------------------------|----------------------------------------------------------------------|
113+
| [esp32](ports/esp32)* | Espressif ESP32 SoCs (ESP32, ESP32S2, ESP32S3, ESP32C3, ESP32C6) | [here](https://docs.micropython.org/en/latest/esp32/quickref.html) |
114+
| [mimxrt](ports/mimxrt) | NXP m.iMX RT | [here](https://docs.micropython.org/en/latest/mimxrt/quickref.html) |
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| [rp2](ports/rp2) | Raspberry Pi RP2040 and RP2350 | [here](https://docs.micropython.org/en/latest/rp2/quickref.html) |
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| [samd](ports/samd) | Microchip (formerly Atmel) SAMD21 and SAMD51 | [here](https://docs.micropython.org/en/latest/samd/quickref.html) |
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| [stm32](ports/stm32) | STMicroelectronics STM32 MCUs (F0, F4, F7, G0, G4, H5, H7, L0, L1, L4, N6, WB, WL) | [here](https://docs.micropython.org/en/latest/pyboard/quickref.html) |
118+
| [unix](ports/unix) | Linux, BSD, macOS, WSL | [here](https://docs.micropython.org/en/latest/unix/quickref.html) |
119+
| [windows](ports/windows) | Microsoft Windows | [here](https://docs.micropython.org/en/latest/unix/quickref.html) |
120+
121+
An asterisk indicates that the port has ongoing financial support from the vendor.
122+
123+
Tier 2 Ports
124+
============
125+
126+
✔ Ports in [Tier 2](https://docs.micropython.org/en/latest/develop/support_tiers.html)
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are less mature and less actively developed and tested than Tier 1, but
128+
still fully supported:
129+
130+
| Port | Target | Quick Reference |
131+
|----------------------------------|-------------------------------------------------------------|-------------------------------------------------------------------------|
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| [alif](ports/alif) | Alif Semiconductor Ensemble MCUs (E3, E7) | |
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| [embed](ports/embed) | Generates a set of .c/.h files for embedding into a project | |
134+
| [nrf](ports/nrf) | Nordic Semiconductor nRF51 and nRF52 | |
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| [renesas-ra](ports/renesas-ra) | Renesas RA family | [here](https://docs.micropython.org/en/latest/renesas-ra/quickref.html) |
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| [webassembly](ports/webassembly) | Emscripten port targeting browsers and NodeJS | |
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| [zephyr](ports/zephyr) | Zephyr RTOS | [here](https://docs.micropython.org/en/latest/zephyr/quickref.html) |
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139+
Tier 3 Ports
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============
141+
142+
Ports in [Tier 3](https://docs.micropython.org/en/latest/develop/support_tiers.html)
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are built in CI but not regularly tested by the MicroPython maintainers:
144+
145+
| Port | Target | Quick Reference |
146+
|----------------------------|-------------------------------------------------------------------|-------------------------------------------------------------------------|
147+
| [cc3200](ports/cc3200) | Texas Instruments CC3200 | [For WiPy](https://docs.micropython.org/en/latest/wipy/quickref.html) |
148+
| [esp8266](ports/esp8266) | Espressif ESP8266 SoC | [here](https://docs.micropython.org/en/latest/esp8266/quickref.html) |
149+
| [pic16bit](ports/pic16bit) | Microchip PIC 16-bit | |
150+
| [powerpc](ports/powerpc) | IBM PowerPC (including Microwatt) | |
151+
152+
Additional Ports
153+
================
154+
155+
In addition to the above there is a Tier M containing ports that are used
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primarily for maintenance, development and testing:
157+
158+
- The ["bare-arm"](ports/bare-arm) port is an example of the absolute minimum
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configuration that still includes the compiler, and is used to keep track
160+
of the code size of the core runtime and VM.
161+
162+
- The ["minimal"](ports/minimal) port provides an example of a very basic
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MicroPython port and can be compiled as both a standalone Linux binary as
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well as for ARM Cortex-M4. Start with this if you want to port MicroPython
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to another microcontroller.
166+
167+
- The [qemu](ports/qemu) port is a QEMU-based emulated target for Cortex-A,
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Cortex-M, RISC-V 32-bit and RISC-V 64-bit architectures.
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The MicroPython cross-compiler, mpy-cross
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-----------------------------------------

docs/develop/index.rst

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publiccapi.rst
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extendingmicropython.rst
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porting.rst
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support_tiers.rst

docs/develop/porting.rst

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// Type definitions for the specific machine.
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typedef intptr_t mp_int_t; // must be pointer size
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typedef uintptr_t mp_uint_t; // must be pointer size
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typedef long mp_off_t;
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// We need to provide a declaration/definition of alloca().

docs/develop/support_tiers.rst

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MicroPython Support Tiers
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=========================
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MicroPython operates with a set of Support Tier levels for the various ports.
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Tiers 1, 2 and 3 are the main Tier levels with Tier 1 being the most mature and
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actively maintained. There is also Tier M for additional ports used primarily
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for maintenance, development and testing. These Tier levels are defined in the
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table below.
9+
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.. table::
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:widths: 40 9 9 9 9
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+-----------------------------------------------+--------+--------+--------+--------+
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| | Tier 1 | Tier 2 | Tier 3 | Tier M |
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+-----------------------------------------------+--------+--------+--------+--------+
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| builds pass under CI |||||
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+-----------------------------------------------+--------+--------+--------+--------+
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| tests run under CI (where possible) |||||
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+-----------------------------------------------+--------+--------+--------+--------+
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| actively maintained ||| ||
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+-----------------------------------------------+--------+--------+--------+--------+
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| stable Python API ||| | |
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+-----------------------------------------------+--------+--------+--------+--------+
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| new features actively developed ||| | |
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+-----------------------------------------------+--------+--------+--------+--------+
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| tested on hardware for releases ||| | |
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+-----------------------------------------------+--------+--------+--------+--------+
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| prioritized bug reports || | ||
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+-----------------------------------------------+--------+--------+--------+--------+
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| regressions warrant a patch release || | ||
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+-----------------------------------------------+--------+--------+--------+--------+
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| has port-specific documentation || | | |
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+-----------------------------------------------+--------+--------+--------+--------+
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Lower Tiers may tick more boxes, but the above table defines the minimum requirements
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for a port to belong to a Tier.
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Tier 1 ports:
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- esp32
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- mimxrt
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- rp2
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- samd
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- stm32
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- unix
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- windows
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Tier 2 ports:
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- alif
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- embed
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- nrf
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- renesas-ra
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- webassembly
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- zephyr
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Tier 3 ports:
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- cc3200
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- esp8266
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- pic16bit
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- powerpc
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Tier M ports:
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- bare-arm
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- minimal
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- qemu

docs/library/esp32.rst

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.. note:: This is only available for boards that have ext1 support.
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.. function:: wake_on_gpio(pins, level)
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Configure how GPIO wakes the device from sleep. *pins* can be ``None``
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or a tuple/list of valid Pin objects. *level* should be ``esp32.WAKEUP_ALL_LOW``
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or ``esp32.WAKEUP_ANY_HIGH``.
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.. note:: Some boards don't support waking on GPIO from deep sleep,
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on those boards, the pins set here can only be used to wake from light sleep.
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.. function:: gpio_deep_sleep_hold(enable)
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Configure whether non-RTC GPIO pin configuration is retained during

docs/reference/mpyfiles.rst

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sys_mpy = sys.implementation._mpy
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arch = [None, 'x86', 'x64',
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'armv6', 'armv6m', 'armv7m', 'armv7em', 'armv7emsp', 'armv7emdp',
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'xtensa', 'xtensawin', 'rv32imc', 'rv64imc'][sys_mpy >> 10]
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'xtensa', 'xtensawin', 'rv32imc', 'rv64imc'][(sys_mpy >> 10) & 0x0F]
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print('mpy version:', sys_mpy & 0xff)
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print('mpy sub-version:', sys_mpy >> 8 & 3)
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if (sys_mpy >> 16) != 0:
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print(' -march-flags=' + (sys_mpy >> 16), end='')
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* Check the validity of the .mpy file by inspecting the first two bytes of
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* If the third byte of the .mpy file has bit #6 set, then check whether the
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encoded architecture-specific flag bits vuint is compatible with the
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The following table shows the correspondence between MicroPython release
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====== ================================
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byte value 0x4d (ASCII 'M')
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byte .mpy major version number
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byte native arch and minor version number (was feature flags in older versions)
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byte feature flags, native arch, minor version number (was feature flags in older versions)
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byte number of bits in a small int
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====== ================================
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The third byte is split as follows (MSB first):
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====== ================================
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bit meaning
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====== ================================
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7 reserved, must be 0
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6 an architecture-specific flags vuint follows the header
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5..2 native arch number
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1..0 minor version number
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====== ================================
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Architecture-specific flags
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~~~~~~~~~~~~~~~~~~~~~~~~~~~
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If bit #6 of the header's feature flags byte is set, then a vuint containing
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optional architecture-specific information will follow the header. The contents
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of this integer depends on which native architecture the file is meant for.
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This is currently used to store which RISC-V processor extensions the MPY file
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needs to operate correctly besides I, M, C, and Zicsr. Different flavours of
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ArmV7 are identified by their native architecture number, but reusing that
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mechanism would complicate things for RV32 and RV64.
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MPY files targeting RV32 or RV64 that do not need any particular processor
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extensions do not need to provide a flags integer (along with setting the
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appropriate bit in the header). The lack of a flags value for RV32 and RV64
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MPY files is used to indicate that no specific extensions are needed, and saves
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one byte in the final output binary.
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See also the ``-march-flags`` command-line option in both ``mpy-tool.py`` and
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``mpy-cross`` to set this value when creating MPY files.
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The global qstr and constant tables
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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docs/zephyr/quickref.rst

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Disk Access
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-----------
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Use the :ref:`zephyr.DiskAccess <zephyr.DiskAccess>` class to support filesystem::
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Storage devices such as SD cards are automatically mounted at startup (e.g., at ``/sd``).
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For manual mounting, use the :ref:`zephyr.DiskAccess <zephyr.DiskAccess>` class::
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import vfs
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from zephyr import DiskAccess
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print(DiskAccess.disks) # list available disk names, e.g., ('SDHC',)
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block_dev = DiskAccess('SDHC') # create a block device object for an SD card
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vfs.VfsFat.mkfs(block_dev) # create FAT filesystem object using the disk storage block
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vfs.mount(block_dev, '/sd') # mount the filesystem at the SD card subdirectory
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Flash Area
153156
----------
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Use the :ref:`zephyr.FlashArea <zephyr.FlashArea>` class to support filesystem::
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Flash storage is automatically mounted at ``/flash`` at startup with automatic filesystem creation.
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For manual mounting, use the :ref:`zephyr.FlashArea <zephyr.FlashArea>` class::
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import vfs
158162
from zephyr import FlashArea
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block_dev = FlashArea(4, 4096) # creates a block device object in the frdm-k64f flash scratch partition
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print(FlashArea.areas) # list available areas, e.g., {'storage': 1, 'scratch': 4}
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block_dev = FlashArea(FlashArea.areas['scratch'], 4096) # creates a block device object using the scratch partition
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vfs.VfsLfs2.mkfs(block_dev) # create filesystem in lfs2 format using the flash block device
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vfs.mount(block_dev, '/flash') # mount the filesystem at the flash subdirectory
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f.write('Hello world') # write to the file
167173
print(open('/flash/hello.txt').read()) # print contents of the file
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The ``FlashAreas``' IDs that are available are listed in the FlashArea module, as ``ID_*``.
170-
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Sensor
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------
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