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tinebptinebp
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FpNew RTL fix
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‎README.md‎

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -88,4 +88,9 @@ More detailed build instructions can be found [here](docs/install_vortex.md).
8888
- Making changes to Makefiles in your source tree or adding new folders will require executing the "configure" script again to get it propagated into your build folder.
8989
```sh
9090
$ ../configure
91-
```
91+
```
92+
- To debug the GPU, you can generate a "run.log" trace. see /docs/debugging.md for more information.
93+
```sh
94+
$ ./ci/blackbox.sh --app=demo --debug=3
95+
```
96+
- For additional information, check out the /docs.

‎ci/regression.sh.in‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -78,7 +78,6 @@ isa()
7878

7979
if [ "$XLEN" == "64" ]
8080
then
81-
8281
make -C sim/rtlsim clean && CONFIGS="-DFPU_FPNEW" make -C sim/rtlsim > /dev/null
8382
make -C tests/riscv/isa run-rtlsim-64d
8483

‎hw/rtl/fpu/VX_fpu_fpnew.sv‎

Lines changed: 37 additions & 83 deletions
Original file line numberDiff line numberDiff line change
@@ -1,10 +1,10 @@
11
// Copyright © 2019-2023
2-
//
2+
//
33
// Licensed under the Apache License, Version 2.0 (the "License");
44
// you may not use this file except in compliance with the License.
55
// You may obtain a copy of the License at
66
// http://www.apache.org/licenses/LICENSE-2.0
7-
//
7+
//
88
// Unless required by applicable law or agreed to in writing, software
99
// distributed under the License is distributed on an "AS IS" BASIS,
1010
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
@@ -15,12 +15,12 @@
1515

1616
`ifdef FPU_FPNEW
1717

18-
module VX_fpu_fpnew
19-
import VX_fpu_pkg::*;
20-
import fpnew_pkg::*;
21-
import cf_math_pkg::*;
18+
module VX_fpu_fpnew
19+
import VX_fpu_pkg::*;
20+
import fpnew_pkg::*;
21+
import cf_math_pkg::*;
2222
import defs_div_sqrt_mvp::*;
23-
#(
23+
#(
2424
parameter NUM_LANES = 1,
2525
parameter TAG_WIDTH = 1,
2626
parameter OUT_BUF = 0
@@ -34,15 +34,15 @@ module VX_fpu_fpnew
3434
input wire [NUM_LANES-1:0] mask_in,
3535

3636
input wire [TAG_WIDTH-1:0] tag_in,
37-
37+
3838
input wire [`INST_FPU_BITS-1:0] op_type,
3939
input wire [`INST_FMT_BITS-1:0] fmt,
4040
input wire [`INST_FRM_BITS-1:0] frm,
4141

4242
input wire [NUM_LANES-1:0][`XLEN-1:0] dataa,
4343
input wire [NUM_LANES-1:0][`XLEN-1:0] datab,
4444
input wire [NUM_LANES-1:0][`XLEN-1:0] datac,
45-
output wire [NUM_LANES-1:0][`XLEN-1:0] result,
45+
output wire [NUM_LANES-1:0][`XLEN-1:0] result,
4646

4747
output wire has_fflags,
4848
output wire [`FP_FLAGS_BITS-1:0] fflags,
@@ -51,32 +51,27 @@ module VX_fpu_fpnew
5151

5252
input wire ready_out,
5353
output wire valid_out
54-
);
54+
);
5555
localparam LATENCY_FDIVSQRT = `MAX(`LATENCY_FDIV, `LATENCY_FSQRT);
5656
localparam RSP_DATAW = (NUM_LANES * `XLEN) + 1 + $bits(fflags_t) + TAG_WIDTH;
5757

58-
`ifdef XLEN_64
59-
// use scalar configuration for mixed formats
6058
localparam fpnew_pkg::fpu_features_t FPU_FEATURES = '{
6159
Width: unsigned'(`XLEN),
6260
EnableVectors: 1'b0,
61+
`ifdef XLEN_64
6362
EnableNanBox: 1'b1,
6463
`ifdef FLEN_64
6564
FpFmtMask: 5'b11000,
6665
`else
67-
FpFmtMask: 5'b11000, // TODO: added FP64 to fix CVT bug in FpNew
66+
FpFmtMask: 5'b11000, // TODO: adding FP64 to fix CVT bug in FpNew
6867
`endif
6968
IntFmtMask: 4'b0011
70-
};
71-
`else
72-
localparam fpnew_pkg::fpu_features_t FPU_FEATURES = '{
73-
Width: unsigned'(`XLEN * NUM_LANES),
74-
EnableVectors: 1'b1,
69+
`else
7570
EnableNanBox: 1'b0,
7671
FpFmtMask: 5'b10000,
7772
IntFmtMask: 4'b0010
73+
`endif
7874
};
79-
`endif
8075

8176
localparam fpnew_pkg::fpu_implementation_t FPU_IMPLEMENTATION = '{
8277
PipeRegs:'{'{`LATENCY_FMA, 0, 0, 0, 0}, // ADDMUL
@@ -89,12 +84,12 @@ module VX_fpu_fpnew
8984
'{default: fpnew_pkg::MERGED}}, // CONV
9085
PipeConfig: fpnew_pkg::DISTRIBUTED
9186
};
92-
93-
wire fpu_ready_in, fpu_valid_in;
87+
88+
wire fpu_ready_in, fpu_valid_in;
9489
wire fpu_ready_out, fpu_valid_out;
9590

9691
reg [TAG_WIDTH-1:0] fpu_tag_in, fpu_tag_out;
97-
92+
9893
reg [2:0][NUM_LANES-1:0][`XLEN-1:0] fpu_operands;
9994

10095
wire [NUM_LANES-1:0][`XLEN-1:0] fpu_result;
@@ -111,12 +106,12 @@ module VX_fpu_fpnew
111106

112107
always @(*) begin
113108
fpu_op = 'x;
114-
fpu_rnd = frm;
115-
fpu_op_mod = 0;
109+
fpu_rnd = frm;
110+
fpu_op_mod = 0;
116111
fpu_has_fflags = 1;
117112
fpu_operands[0] = dataa;
118113
fpu_operands[1] = datab;
119-
fpu_operands[2] = datac;
114+
fpu_operands[2] = datac;
120115
fpu_dst_fmt = fpnew_pkg::FP32;
121116
fpu_int_fmt = fpnew_pkg::INT32;
122117

@@ -133,24 +128,24 @@ module VX_fpu_fpnew
133128
`endif
134129

135130
fpu_src_fmt = fpu_dst_fmt;
136-
131+
137132
case (op_type)
138133
`INST_FPU_ADD: begin
139134
fpu_op = fpnew_pkg::ADD;
140135
fpu_operands[1] = dataa;
141136
fpu_operands[2] = datab;
142137
end
143-
`INST_FPU_SUB: begin
144-
fpu_op = fpnew_pkg::ADD;
138+
`INST_FPU_SUB: begin
139+
fpu_op = fpnew_pkg::ADD;
145140
fpu_operands[1] = dataa;
146141
fpu_operands[2] = datab;
147-
fpu_op_mod = 1;
142+
fpu_op_mod = 1;
148143
end
149144
`INST_FPU_MUL: begin fpu_op = fpnew_pkg::MUL; end
150145
`INST_FPU_DIV: begin fpu_op = fpnew_pkg::DIV; end
151146
`INST_FPU_SQRT: begin fpu_op = fpnew_pkg::SQRT; end
152147
`INST_FPU_MADD: begin fpu_op = fpnew_pkg::FMADD; end
153-
`INST_FPU_MSUB: begin fpu_op = fpnew_pkg::FMADD; fpu_op_mod = 1; end
148+
`INST_FPU_MSUB: begin fpu_op = fpnew_pkg::FMADD; fpu_op_mod = 1; end
154149
`INST_FPU_NMADD: begin fpu_op = fpnew_pkg::FNMSUB; fpu_op_mod = 1; end
155150
`INST_FPU_NMSUB: begin fpu_op = fpnew_pkg::FNMSUB; end
156151
`ifdef FLEN_64
@@ -164,30 +159,18 @@ module VX_fpu_fpnew
164159
`INST_FPU_MISC:begin
165160
case (frm)
166161
0,1,2: begin fpu_op = fpnew_pkg::SGNJ; fpu_rnd = {1'b0, frm[1:0]}; fpu_has_fflags = 0; end // FSGNJ
167-
3: begin fpu_op = fpnew_pkg::CLASSIFY; fpu_has_fflags = 0; end // CLASS
162+
3: begin fpu_op = fpnew_pkg::CLASSIFY; fpu_has_fflags = 0; end // CLASS
168163
4,5: begin fpu_op = fpnew_pkg::SGNJ; fpu_rnd = 3'b011; fpu_op_mod = ~frm[0]; fpu_has_fflags = 0; end // FMV.X.W, FMV.W.X
169164
6,7: begin fpu_op = fpnew_pkg::MINMAX; fpu_rnd = {2'b00, frm[0]}; end // MIN, MAX
170-
endcase
165+
endcase
171166
end
172167
default:;
173168
endcase
174-
175-
`ifdef FPU_RV64F
176-
// apply nan-boxing to floating-point operands
177-
for (integer i = 0; i < NUM_LANES; ++i) begin
178-
if (op_type != `INST_FPU_I2F && op_type != `INST_FPU_U2F) begin
179-
fpu_operands[0][i] |= 64'hffffffff00000000;
180-
end
181-
fpu_operands[1][i] |= 64'hffffffff00000000;
182-
fpu_operands[2][i] |= 64'hffffffff00000000;
183-
end
184-
`endif
185169
end
186170

187-
`ifdef XLEN_64
188171
`UNUSED_VAR (mask_in)
189172
for (genvar i = 0; i < NUM_LANES; ++i) begin
190-
wire [(TAG_WIDTH+1)-1:0] fpu_tag;
173+
wire [(TAG_WIDTH+1)-1:0] fpu_tag;
191174
wire fpu_valid_out_uq;
192175
wire fpu_ready_in_uq;
193176
fpnew_pkg::status_t fpu_status_uq;
@@ -196,10 +179,12 @@ module VX_fpu_fpnew
196179
`UNUSED_VAR (fpu_ready_in_uq)
197180
`UNUSED_VAR (fpu_status_uq)
198181

199-
fpnew_top #(
182+
fpnew_top #(
200183
.Features (FPU_FEATURES),
201184
.Implementation (FPU_IMPLEMENTATION),
202-
.TagType (logic[(TAG_WIDTH+1)-1:0])
185+
.TagType (logic[(TAG_WIDTH+1)-1:0]),
186+
.TrueSIMDClass (1),
187+
.EnableSIMDMask (1)
203188
) fpnew_core (
204189
.clk_i (clk),
205190
.rst_ni (~reset),
@@ -210,9 +195,9 @@ module VX_fpu_fpnew
210195
.src_fmt_i (fpu_src_fmt),
211196
.dst_fmt_i (fpu_dst_fmt),
212197
.int_fmt_i (fpu_int_fmt),
213-
`UNUSED_PIN (vectorial_op_i),
214-
`UNUSED_PIN (simd_mask_i),
215-
.tag_i ({fpu_tag_in, fpu_has_fflags}),
198+
.vectorial_op_i (1'b0),
199+
.simd_mask_i (mask_in[i]),
200+
.tag_i ({fpu_tag_in, fpu_has_fflags}),
216201
.in_valid_i (fpu_valid_in),
217202
.in_ready_o (fpu_ready_in_uq),
218203
.flush_i (reset),
@@ -223,45 +208,14 @@ module VX_fpu_fpnew
223208
.out_ready_i (fpu_ready_out),
224209
`UNUSED_PIN (busy_o)
225210
);
226-
211+
227212
if (i == 0) begin
228-
assign {fpu_tag_out, fpu_has_fflags_out} = fpu_tag;
213+
assign {fpu_tag_out, fpu_has_fflags_out} = fpu_tag;
229214
assign fpu_valid_out = fpu_valid_out_uq;
230215
assign fpu_ready_in = fpu_ready_in_uq;
231216
assign fpu_status = fpu_status_uq;
232217
end
233218
end
234-
`else
235-
fpnew_top #(
236-
.Features (FPU_FEATURES),
237-
.Implementation (FPU_IMPLEMENTATION),
238-
.TagType (logic[(TAG_WIDTH+1)-1:0]),
239-
.TrueSIMDClass (1),
240-
.EnableSIMDMask (1)
241-
) fpnew_core (
242-
.clk_i (clk),
243-
.rst_ni (~reset),
244-
.operands_i (fpu_operands),
245-
.rnd_mode_i (fpnew_pkg::roundmode_e'(fpu_rnd)),
246-
.op_i (fpu_op),
247-
.op_mod_i (fpu_op_mod),
248-
.src_fmt_i (fpu_src_fmt),
249-
.dst_fmt_i (fpu_dst_fmt),
250-
.int_fmt_i (fpu_int_fmt),
251-
.vectorial_op_i (1'b1),
252-
.simd_mask_i (mask_in),
253-
.tag_i ({fpu_tag_in, fpu_has_fflags}),
254-
.in_valid_i (fpu_valid_in),
255-
.in_ready_o (fpu_ready_in),
256-
.flush_i (reset),
257-
.result_o (fpu_result),
258-
.status_o (fpu_status),
259-
.tag_o ({fpu_tag_out, fpu_has_fflags_out}),
260-
.out_valid_o (fpu_valid_out),
261-
.out_ready_i (fpu_ready_out),
262-
`UNUSED_PIN (busy_o)
263-
);
264-
`endif
265219

266220
assign fpu_valid_in = valid_in;
267221
assign ready_in = fpu_ready_in;

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