@@ -759,6 +759,7 @@ function generate_connection_equations_and_stream_connections(
759759 var = variable_from_vertex (sys, cvert):: BasicSymbolic
760760 vtype = cvert. type
761761 if vtype <: Union{InputVar, OutputVar}
762+ length (cset) > 1 || continue
762763 inner_output = nothing
763764 outer_input = nothing
764765 for cvert in cset
@@ -780,11 +781,11 @@ function generate_connection_equations_and_stream_connections(
780781 inner_output = cvert
781782 end
782783 end
783- root, rest = Iterators . peel (cset )
784- root_var = variable_from_vertex (sys, root )
785- for cvert in rest
786- var = variable_from_vertex (sys, cvert)
787- push! (eqs, root_var ~ var )
784+ root_vert = something (inner_output, outer_input )
785+ root_var = variable_from_vertex (sys, root_vert )
786+ for cvert in cset
787+ isequal (cvert, root_vert) && continue
788+ push! (eqs, variable_from_vertex (sys, cvert) ~ root_var )
788789 end
789790 elseif vtype === Stream
790791 push! (stream_connections, cset)
@@ -807,10 +808,37 @@ function generate_connection_equations_and_stream_connections(
807808 push! (eqs, 0 ~ rhs)
808809 end
809810 else # Equality
810- base = variable_from_vertex (sys, cset[1 ])
811- for i in 2 : length (cset)
812- v = variable_from_vertex (sys, cset[i])
813- push! (eqs, base ~ v)
811+ vars = map (Base. Fix1 (variable_from_vertex, sys), cset)
812+ outer_input = inner_output = nothing
813+ all_io = true
814+ # attempt to interpret the equality as a causal connectionset if
815+ # possible
816+ for (cvert, vert) in zip (cset, vars)
817+ is_i = isinput (vert)
818+ is_o = isoutput (vert)
819+ all_io &= is_i || is_o
820+ all_io || break
821+ if cvert. isouter && is_i && outer_input === nothing
822+ outer_input = cvert
823+ elseif ! cvert. isouter && is_o && inner_output === nothing
824+ inner_output = cvert
825+ end
826+ end
827+ # this doesn't necessarily mean this is a well-structured causal connection,
828+ # but it is sufficient and we're generating equalities anyway.
829+ if all_io && xor (outer_input != = nothing , inner_output != = nothing )
830+ root_vert = something (inner_output, outer_input)
831+ root_var = variable_from_vertex (sys, root_vert)
832+ for (cvert, var) in zip (cset, vars)
833+ isequal (cvert, root_vert) && continue
834+ push! (eqs, var ~ root_var)
835+ end
836+ else
837+ base = variable_from_vertex (sys, cset[1 ])
838+ for i in 2 : length (cset)
839+ v = vars[i]
840+ push! (eqs, base ~ v)
841+ end
814842 end
815843 end
816844 end
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