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Merge patch series "can: rcar_canfd: R-Car CANFD Improvements"
Biju <biju.das.au@gmail.com> says: From: Biju Das <biju.das.jz@bp.renesas.com> The calculation formula for nominal bit rate of classical CAN is same as that of nominal bit rate of CANFD on the RZ/G3E SoC and R-Car Gen4 compared to other SoCs. Update the nominal bit rate constants. Apart from this, for replacing function-like macros, introduced rcar_canfd_compute_{nominal,data}_bit_rate_cfg(). v2->v3: * Replaced "shared_bittiming"->"shared_can_regs" as it is same for RZ/G3E and R-Car Gen4. * Updated commit header and description for patch#1. * Added Rb tag from Geert for patch #2,#3 and #4. * Dropped _MASK suffix from RCANFD_CFG_* macros. * Dropped _MASK suffix from RCANFD_NCFG_NBRP_MASK macro. * Dropped _MASK suffix from the macro RCANFD_DCFG_DBRP_MASK. * Followed the order as used in struct can_bittiming{_const} for easy maintenance. v1->v2: * Dropped patch#2 as it is accepted. * Moved patch#4 to patch#2. * Updated commit header and description for patch#2. * Kept RCANFD_CFG* macro definitions to give a meaning to the magic number using GENMASK macro and used FIELD_PREP to extract value. * Split patch#3 for computing nominal and data bit rate config separate. * Updated rcar_canfd_compute_nominal_bit_rate_cfg() to handle nominal bit rate configuration for both classical CAN and CANFD. * Replaced RCANFD_NCFG_NBRP->RCANFD_NCFG_NBRP_MASK and used FIELD_PREP to extract value. * Replaced RCANFD_DCFG_DBRP->RCANFD_DCFG_DBRP_MASK and used FIELD_PREP to extract value. Link: https://patch.msgid.link/20250908120940.147196-1-biju.das.jz@bp.renesas.com Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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‎drivers/net/can/rcar/rcar_canfd.c‎

Lines changed: 47 additions & 37 deletions
Original file line numberDiff line numberDiff line change
@@ -103,22 +103,13 @@
103103
/* Channel register bits */
104104

105105
/* RSCFDnCmCFG - Classical CAN only */
106-
#define RCANFD_CFG_SJW(x) (((x) & 0x3) << 24)
107-
#define RCANFD_CFG_TSEG2(x) (((x) & 0x7) << 20)
108-
#define RCANFD_CFG_TSEG1(x) (((x) & 0xf) << 16)
109-
#define RCANFD_CFG_BRP(x) (((x) & 0x3ff) << 0)
106+
#define RCANFD_CFG_SJW GENMASK(25, 24)
107+
#define RCANFD_CFG_TSEG2 GENMASK(22, 20)
108+
#define RCANFD_CFG_TSEG1 GENMASK(19, 16)
109+
#define RCANFD_CFG_BRP GENMASK(9, 0)
110110

111111
/* RSCFDnCFDCmNCFG - CAN FD only */
112-
#define RCANFD_NCFG_NTSEG2(gpriv, x) \
113-
(((x) & ((gpriv)->info->nom_bittiming->tseg2_max - 1)) << (gpriv)->info->sh->ntseg2)
114-
115-
#define RCANFD_NCFG_NTSEG1(gpriv, x) \
116-
(((x) & ((gpriv)->info->nom_bittiming->tseg1_max - 1)) << (gpriv)->info->sh->ntseg1)
117-
118-
#define RCANFD_NCFG_NSJW(gpriv, x) \
119-
(((x) & ((gpriv)->info->nom_bittiming->sjw_max - 1)) << (gpriv)->info->sh->nsjw)
120-
121-
#define RCANFD_NCFG_NBRP(x) (((x) & 0x3ff) << 0)
112+
#define RCANFD_NCFG_NBRP GENMASK(9, 0)
122113

123114
/* RSCFDnCFDCmCTR / RSCFDnCmCTR */
124115
#define RCANFD_CCTR_CTME BIT(24)
@@ -178,15 +169,7 @@
178169
#define RCANFD_CERFL_ERR(x) ((x) & (0x7fff)) /* above bits 14:0 */
179170

180171
/* RSCFDnCFDCmDCFG */
181-
#define RCANFD_DCFG_DSJW(gpriv, x) (((x) & ((gpriv)->info->data_bittiming->sjw_max - 1)) << 24)
182-
183-
#define RCANFD_DCFG_DTSEG2(gpriv, x) \
184-
(((x) & ((gpriv)->info->data_bittiming->tseg2_max - 1)) << (gpriv)->info->sh->dtseg2)
185-
186-
#define RCANFD_DCFG_DTSEG1(gpriv, x) \
187-
(((x) & ((gpriv)->info->data_bittiming->tseg1_max - 1)) << (gpriv)->info->sh->dtseg1)
188-
189-
#define RCANFD_DCFG_DBRP(x) (((x) & 0xff) << 0)
172+
#define RCANFD_DCFG_DBRP GENMASK(7, 0)
190173

191174
/* RSCFDnCFDCmFDCFG */
192175
#define RCANFD_GEN4_FDCFG_CLOE BIT(30)
@@ -1388,6 +1371,41 @@ static irqreturn_t rcar_canfd_channel_interrupt(int irq, void *dev_id)
13881371
return IRQ_HANDLED;
13891372
}
13901373

1374+
static inline u32 rcar_canfd_compute_nominal_bit_rate_cfg(struct rcar_canfd_channel *priv,
1375+
u16 tseg1, u16 tseg2, u16 sjw, u16 brp)
1376+
{
1377+
struct rcar_canfd_global *gpriv = priv->gpriv;
1378+
const struct rcar_canfd_hw_info *info = gpriv->info;
1379+
u32 ntseg1, ntseg2, nsjw, nbrp;
1380+
1381+
if ((priv->can.ctrlmode & CAN_CTRLMODE_FD) || gpriv->info->shared_can_regs) {
1382+
ntseg1 = (tseg1 & (info->nom_bittiming->tseg1_max - 1)) << info->sh->ntseg1;
1383+
ntseg2 = (tseg2 & (info->nom_bittiming->tseg2_max - 1)) << info->sh->ntseg2;
1384+
nsjw = (sjw & (info->nom_bittiming->sjw_max - 1)) << info->sh->nsjw;
1385+
nbrp = FIELD_PREP(RCANFD_NCFG_NBRP, brp);
1386+
} else {
1387+
ntseg1 = FIELD_PREP(RCANFD_CFG_TSEG1, tseg1);
1388+
ntseg2 = FIELD_PREP(RCANFD_CFG_TSEG2, tseg2);
1389+
nsjw = FIELD_PREP(RCANFD_CFG_SJW, sjw);
1390+
nbrp = FIELD_PREP(RCANFD_CFG_BRP, brp);
1391+
}
1392+
1393+
return (ntseg1 | ntseg2 | nsjw | nbrp);
1394+
}
1395+
1396+
static inline u32 rcar_canfd_compute_data_bit_rate_cfg(const struct rcar_canfd_hw_info *info,
1397+
u16 tseg1, u16 tseg2, u16 sjw, u16 brp)
1398+
{
1399+
u32 dtseg1, dtseg2, dsjw, dbrp;
1400+
1401+
dtseg1 = (tseg1 & (info->data_bittiming->tseg1_max - 1)) << info->sh->dtseg1;
1402+
dtseg2 = (tseg2 & (info->data_bittiming->tseg2_max - 1)) << info->sh->dtseg2;
1403+
dsjw = (sjw & (info->data_bittiming->sjw_max - 1)) << 24;
1404+
dbrp = FIELD_PREP(RCANFD_DCFG_DBRP, brp);
1405+
1406+
return (dtseg1 | dtseg2 | dsjw | dbrp);
1407+
}
1408+
13911409
static void rcar_canfd_set_bittiming(struct net_device *ndev)
13921410
{
13931411
u32 mask = RCANFD_FDCFG_TDCO | RCANFD_FDCFG_TDCE | RCANFD_FDCFG_TDCOC;
@@ -1406,15 +1424,7 @@ static void rcar_canfd_set_bittiming(struct net_device *ndev)
14061424
sjw = bt->sjw - 1;
14071425
tseg1 = bt->prop_seg + bt->phase_seg1 - 1;
14081426
tseg2 = bt->phase_seg2 - 1;
1409-
1410-
if ((priv->can.ctrlmode & CAN_CTRLMODE_FD) || gpriv->info->shared_can_regs) {
1411-
cfg = (RCANFD_NCFG_NTSEG1(gpriv, tseg1) | RCANFD_NCFG_NBRP(brp) |
1412-
RCANFD_NCFG_NSJW(gpriv, sjw) | RCANFD_NCFG_NTSEG2(gpriv, tseg2));
1413-
} else {
1414-
cfg = (RCANFD_CFG_TSEG1(tseg1) | RCANFD_CFG_BRP(brp) |
1415-
RCANFD_CFG_SJW(sjw) | RCANFD_CFG_TSEG2(tseg2));
1416-
}
1417-
1427+
cfg = rcar_canfd_compute_nominal_bit_rate_cfg(priv, tseg1, tseg2, sjw, brp);
14181428
rcar_canfd_write(priv->base, RCANFD_CCFG(ch), cfg);
14191429

14201430
if (!(priv->can.ctrlmode & CAN_CTRLMODE_FD))
@@ -1425,10 +1435,7 @@ static void rcar_canfd_set_bittiming(struct net_device *ndev)
14251435
sjw = dbt->sjw - 1;
14261436
tseg1 = dbt->prop_seg + dbt->phase_seg1 - 1;
14271437
tseg2 = dbt->phase_seg2 - 1;
1428-
1429-
cfg = (RCANFD_DCFG_DTSEG1(gpriv, tseg1) | RCANFD_DCFG_DBRP(brp) |
1430-
RCANFD_DCFG_DSJW(gpriv, sjw) | RCANFD_DCFG_DTSEG2(gpriv, tseg2));
1431-
1438+
cfg = rcar_canfd_compute_data_bit_rate_cfg(gpriv->info, tseg1, tseg2, sjw, brp);
14321439
writel(cfg, &gpriv->fcbase[ch].dcfg);
14331440

14341441
/* Transceiver Delay Compensation */
@@ -1912,7 +1919,10 @@ static int rcar_canfd_channel_probe(struct rcar_canfd_global *gpriv, u32 ch,
19121919
priv->can.fd.do_get_auto_tdcv = rcar_canfd_get_auto_tdcv;
19131920
} else {
19141921
/* Controller starts in Classical CAN only mode */
1915-
priv->can.bittiming_const = &rcar_canfd_bittiming_const;
1922+
if (gpriv->info->shared_can_regs)
1923+
priv->can.bittiming_const = gpriv->info->nom_bittiming;
1924+
else
1925+
priv->can.bittiming_const = &rcar_canfd_bittiming_const;
19161926
priv->can.ctrlmode_supported = CAN_CTRLMODE_BERR_REPORTING;
19171927
}
19181928

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