x86/mm: Carve out INVLPG inline asm for use by others

bp3tk0v · bp3tk0v · commit f1d84b59cbb9 · 2024-11-25T11:28:02.000+01:00
No functional changes. Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/r/ZyulbYuvrkshfsd2@antipodes
diff --git a/arch/x86/include/asm/tlb.h b/arch/x86/include/asm/tlb.h
@@ -34,4 +34,8 @@ static inline void __tlb_remove_table(void *table)
 	free_page_and_swap_cache(table);
 }
 
+static inline void invlpg(unsigned long addr)
+{
+	asm volatile("invlpg (%0)" ::"r" (addr) : "memory");
+}
 #endif /* _ASM_X86_TLB_H */
diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c
@@ -20,6 +20,7 @@
 #include <asm/cacheflush.h>
 #include <asm/apic.h>
 #include <asm/perf_event.h>
+#include <asm/tlb.h>
 
 #include "mm_internal.h"
 
@@ -1140,7 +1141,7 @@ STATIC_NOPV void native_flush_tlb_one_user(unsigned long addr)
 	bool cpu_pcide;
 
 	/* Flush 'addr' from the kernel PCID: */
-	asm volatile("invlpg (%0)" ::"r" (addr) : "memory");
+	invlpg(addr);
 
 	/* If PTI is off there is no user PCID and nothing to flush. */
 	if (!static_cpu_has(X86_FEATURE_PTI))

Original file line number	Diff line number	Diff line change
`@@ -34,4 +34,8 @@ static inline void __tlb_remove_table(void *table)`
`34`	`34`	`free_page_and_swap_cache(table);`
`35`	`35`	`}`
`36`	`36`
	`37`	`+static inline void invlpg(unsigned long addr)`
	`38`	`+{`
	`39`	`+ asm volatile("invlpg (%0)" ::"r" (addr) : "memory");`
	`40`	`+}`
`37`	`41`	`#endif /* _ASM_X86_TLB_H */`