@@ -337,7 +337,7 @@ static int emulate_std(struct pt_regs *regs, int frreg, int flop)
337337 : " r19 ", " r20 ", " r21 ", " r22 ", " r1 " );
338338#else
339339 {
340- unsigned long valh = (val >> 32 ),vall = (val & 0xffffffffl );
340+ unsigned long valh = (val >> 32 ), vall = (val & 0xffffffffl );
341341 __asm__ __volatile__ (
342342" mtsp %4, %%sr1\n"
343343" zdep %2, 29, 2, %%r19\n"
@@ -473,7 +473,7 @@ void handle_unaligned(struct pt_regs *regs)
473473 case OPCODE_LDWA_I :
474474 case OPCODE_LDW_S :
475475 case OPCODE_LDWA_S :
476- ret = emulate_ldw (regs , R3 (regs -> iir ),0 );
476+ ret = emulate_ldw (regs , R3 (regs -> iir ), 0 );
477477 break ;
478478
479479 case OPCODE_STH :
@@ -482,45 +482,45 @@ void handle_unaligned(struct pt_regs *regs)
482482
483483 case OPCODE_STW :
484484 case OPCODE_STWA :
485- ret = emulate_stw (regs , R2 (regs -> iir ),0 );
485+ ret = emulate_stw (regs , R2 (regs -> iir ), 0 );
486486 break ;
487487
488488#ifdef CONFIG_64BIT
489489 case OPCODE_LDD_I :
490490 case OPCODE_LDDA_I :
491491 case OPCODE_LDD_S :
492492 case OPCODE_LDDA_S :
493- ret = emulate_ldd (regs , R3 (regs -> iir ),0 );
493+ ret = emulate_ldd (regs , R3 (regs -> iir ), 0 );
494494 break ;
495495
496496 case OPCODE_STD :
497497 case OPCODE_STDA :
498- ret = emulate_std (regs , R2 (regs -> iir ),0 );
498+ ret = emulate_std (regs , R2 (regs -> iir ), 0 );
499499 break ;
500500#endif
501501
502502 case OPCODE_FLDWX :
503503 case OPCODE_FLDWS :
504504 case OPCODE_FLDWXR :
505505 case OPCODE_FLDWSR :
506- ret = emulate_ldw (regs ,FR3 (regs -> iir ),1 );
506+ ret = emulate_ldw (regs , FR3 (regs -> iir ), 1 );
507507 break ;
508508
509509 case OPCODE_FLDDX :
510510 case OPCODE_FLDDS :
511- ret = emulate_ldd (regs ,R3 (regs -> iir ),1 );
511+ ret = emulate_ldd (regs , R3 (regs -> iir ), 1 );
512512 break ;
513513
514514 case OPCODE_FSTWX :
515515 case OPCODE_FSTWS :
516516 case OPCODE_FSTWXR :
517517 case OPCODE_FSTWSR :
518- ret = emulate_stw (regs ,FR3 (regs -> iir ),1 );
518+ ret = emulate_stw (regs , FR3 (regs -> iir ), 1 );
519519 break ;
520520
521521 case OPCODE_FSTDX :
522522 case OPCODE_FSTDS :
523- ret = emulate_std (regs ,R3 (regs -> iir ),1 );
523+ ret = emulate_std (regs , R3 (regs -> iir ), 1 );
524524 break ;
525525
526526 case OPCODE_LDCD_I :
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