@@ -166,6 +166,19 @@ static const struct qusb2_phy_init_tbl ipq5424_init_tbl[] = {
166166 QUSB2_PHY_INIT_CFG (QUSB2PHY_PLL_AUTOPGM_CTL1 , 0x9f ),
167167};
168168
169+ static const struct qusb2_phy_init_tbl qcs615_init_tbl [] = {
170+ QUSB2_PHY_INIT_CFG_L (QUSB2PHY_PORT_TUNE1 , 0xc8 ),
171+ QUSB2_PHY_INIT_CFG_L (QUSB2PHY_PORT_TUNE2 , 0xb3 ),
172+ QUSB2_PHY_INIT_CFG_L (QUSB2PHY_PORT_TUNE3 , 0x83 ),
173+ QUSB2_PHY_INIT_CFG_L (QUSB2PHY_PORT_TUNE4 , 0xc0 ),
174+ QUSB2_PHY_INIT_CFG (QUSB2PHY_PLL_TUNE , 0x30 ),
175+ QUSB2_PHY_INIT_CFG (QUSB2PHY_PLL_USER_CTL1 , 0x79 ),
176+ QUSB2_PHY_INIT_CFG (QUSB2PHY_PLL_USER_CTL2 , 0x21 ),
177+ QUSB2_PHY_INIT_CFG_L (QUSB2PHY_PORT_TEST2 , 0x14 ),
178+ QUSB2_PHY_INIT_CFG (QUSB2PHY_PLL_AUTOPGM_CTL1 , 0x9f ),
179+ QUSB2_PHY_INIT_CFG (QUSB2PHY_PLL_PWR_CTRL , 0x00 ),
180+ };
181+
169182static const unsigned int ipq6018_regs_layout [] = {
170183 [QUSB2PHY_PLL_STATUS ] = 0x38 ,
171184 [QUSB2PHY_PORT_TUNE1 ] = 0x80 ,
@@ -356,6 +369,17 @@ static const struct qusb2_phy_cfg ipq5424_phy_cfg = {
356369 .autoresume_en = BIT (0 ),
357370};
358371
372+ static const struct qusb2_phy_cfg qcs615_phy_cfg = {
373+ .tbl = qcs615_init_tbl ,
374+ .tbl_num = ARRAY_SIZE (qcs615_init_tbl ),
375+ .regs = ipq6018_regs_layout ,
376+
377+ .disable_ctrl = (CLAMP_N_EN | FREEZIO_N | POWER_DOWN ),
378+ .mask_core_ready = PLL_LOCKED ,
379+ /* autoresume not used */
380+ .autoresume_en = BIT (0 ),
381+ };
382+
359383static const struct qusb2_phy_cfg qusb2_v2_phy_cfg = {
360384 .tbl = qusb2_v2_init_tbl ,
361385 .tbl_num = ARRAY_SIZE (qusb2_v2_init_tbl ),
@@ -950,6 +974,9 @@ static const struct of_device_id qusb2_phy_of_match_table[] = {
950974 }, {
951975 .compatible = "qcom,msm8998-qusb2-phy" ,
952976 .data = & msm8998_phy_cfg ,
977+ }, {
978+ .compatible = "qcom,qcs615-qusb2-phy" ,
979+ .data = & qcs615_phy_cfg ,
953980 }, {
954981 .compatible = "qcom,qcm2290-qusb2-phy" ,
955982 .data = & sm6115_phy_cfg ,
0 commit comments