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Peter Zijlstra
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x86/cpu: Fix Gracemont uarch
Alderlake N is an E-core only product using Gracemont micro-architecture. It fits the pre-existing naming scheme perfectly fine, adhere to it. Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Link: https://lore.kernel.org/r/20230807150405.686834933@infradead.org
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14 files changed

+19
-18
lines changed

14 files changed

+19
-18
lines changed

‎arch/x86/events/intel/core.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6167,7 +6167,7 @@ __init int intel_pmu_init(void)
61676167
name = "Tremont";
61686168
break;
61696169

6170-
case INTEL_FAM6_ALDERLAKE_N:
6170+
case INTEL_FAM6_ATOM_GRACEMONT:
61716171
x86_pmu.mid_ack = true;
61726172
memcpy(hw_cache_event_ids, glp_hw_cache_event_ids,
61736173
sizeof(hw_cache_event_ids));

‎arch/x86/events/intel/cstate.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -669,6 +669,7 @@ static const struct x86_cpu_id intel_cstates_match[] __initconst = {
669669
X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, &glm_cstates),
670670
X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT, &glm_cstates),
671671
X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_L, &glm_cstates),
672+
X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, &adl_cstates),
672673

673674
X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, &icl_cstates),
674675
X86_MATCH_INTEL_FAM6_MODEL(ICELAKE, &icl_cstates),
@@ -684,7 +685,6 @@ static const struct x86_cpu_id intel_cstates_match[] __initconst = {
684685
X86_MATCH_INTEL_FAM6_MODEL(ROCKETLAKE, &icl_cstates),
685686
X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, &adl_cstates),
686687
X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, &adl_cstates),
687-
X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N, &adl_cstates),
688688
X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, &adl_cstates),
689689
X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, &adl_cstates),
690690
X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S, &adl_cstates),

‎arch/x86/events/intel/uncore.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1858,7 +1858,6 @@ static const struct x86_cpu_id intel_uncore_match[] __initconst = {
18581858
X86_MATCH_INTEL_FAM6_MODEL(ROCKETLAKE, &rkl_uncore_init),
18591859
X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, &adl_uncore_init),
18601860
X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, &adl_uncore_init),
1861-
X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N, &adl_uncore_init),
18621861
X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, &adl_uncore_init),
18631862
X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, &adl_uncore_init),
18641863
X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S, &adl_uncore_init),
@@ -1867,6 +1866,7 @@ static const struct x86_cpu_id intel_uncore_match[] __initconst = {
18671866
X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, &spr_uncore_init),
18681867
X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X, &spr_uncore_init),
18691868
X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, &snr_uncore_init),
1869+
X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, &adl_uncore_init),
18701870
{},
18711871
};
18721872
MODULE_DEVICE_TABLE(x86cpu, intel_uncore_match);

‎arch/x86/events/msr.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -106,7 +106,7 @@ static bool test_intel(int idx, void *data)
106106
case INTEL_FAM6_ROCKETLAKE:
107107
case INTEL_FAM6_ALDERLAKE:
108108
case INTEL_FAM6_ALDERLAKE_L:
109-
case INTEL_FAM6_ALDERLAKE_N:
109+
case INTEL_FAM6_ATOM_GRACEMONT:
110110
case INTEL_FAM6_RAPTORLAKE:
111111
case INTEL_FAM6_RAPTORLAKE_P:
112112
case INTEL_FAM6_RAPTORLAKE_S:

‎arch/x86/events/rapl.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -804,7 +804,7 @@ static const struct x86_cpu_id rapl_model_match[] __initconst = {
804804
X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE, &model_skl),
805805
X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, &model_skl),
806806
X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, &model_skl),
807-
X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N, &model_skl),
807+
X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, &model_skl),
808808
X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, &model_spr),
809809
X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X, &model_spr),
810810
X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, &model_skl),

‎arch/x86/include/asm/intel-family.h‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -114,7 +114,6 @@
114114

115115
#define INTEL_FAM6_ALDERLAKE 0x97 /* Golden Cove / Gracemont */
116116
#define INTEL_FAM6_ALDERLAKE_L 0x9A /* Golden Cove / Gracemont */
117-
#define INTEL_FAM6_ALDERLAKE_N 0xBE
118117

119118
#define INTEL_FAM6_RAPTORLAKE 0xB7
120119
#define INTEL_FAM6_RAPTORLAKE_P 0xBA
@@ -154,6 +153,8 @@
154153
#define INTEL_FAM6_ATOM_TREMONT 0x96 /* Elkhart Lake */
155154
#define INTEL_FAM6_ATOM_TREMONT_L 0x9C /* Jasper Lake */
156155

156+
#define INTEL_FAM6_ATOM_GRACEMONT 0xBE /* Alderlake N */
157+
157158
#define INTEL_FAM6_SIERRAFOREST_X 0xAF
158159

159160
#define INTEL_FAM6_GRANDRIDGE 0xB6

‎arch/x86/kernel/cpu/intel_epb.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -206,7 +206,7 @@ static int intel_epb_offline(unsigned int cpu)
206206
static const struct x86_cpu_id intel_epb_normal[] = {
207207
X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L,
208208
ENERGY_PERF_BIAS_NORMAL_POWERSAVE),
209-
X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N,
209+
X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT,
210210
ENERGY_PERF_BIAS_NORMAL_POWERSAVE),
211211
X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P,
212212
ENERGY_PERF_BIAS_NORMAL_POWERSAVE),

‎arch/x86/mm/init.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -273,7 +273,7 @@ static void __init probe_page_size_mask(void)
273273
static const struct x86_cpu_id invlpg_miss_ids[] = {
274274
INTEL_MATCH(INTEL_FAM6_ALDERLAKE ),
275275
INTEL_MATCH(INTEL_FAM6_ALDERLAKE_L ),
276-
INTEL_MATCH(INTEL_FAM6_ALDERLAKE_N ),
276+
INTEL_MATCH(INTEL_FAM6_ATOM_GRACEMONT ),
277277
INTEL_MATCH(INTEL_FAM6_RAPTORLAKE ),
278278
INTEL_MATCH(INTEL_FAM6_RAPTORLAKE_P),
279279
INTEL_MATCH(INTEL_FAM6_RAPTORLAKE_S),

‎drivers/idle/intel_idle.c‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -960,7 +960,7 @@ static struct cpuidle_state adl_l_cstates[] __initdata = {
960960
.enter = NULL }
961961
};
962962

963-
static struct cpuidle_state adl_n_cstates[] __initdata = {
963+
static struct cpuidle_state gmt_cstates[] __initdata = {
964964
{
965965
.name = "C1",
966966
.desc = "MWAIT 0x00",
@@ -1405,8 +1405,8 @@ static const struct idle_cpu idle_cpu_adl_l __initconst = {
14051405
.state_table = adl_l_cstates,
14061406
};
14071407

1408-
static const struct idle_cpu idle_cpu_adl_n __initconst = {
1409-
.state_table = adl_n_cstates,
1408+
static const struct idle_cpu idle_cpu_gmt __initconst = {
1409+
.state_table = gmt_cstates,
14101410
};
14111411

14121412
static const struct idle_cpu idle_cpu_spr __initconst = {
@@ -1479,7 +1479,7 @@ static const struct x86_cpu_id intel_idle_ids[] __initconst = {
14791479
X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, &idle_cpu_icx),
14801480
X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, &idle_cpu_adl),
14811481
X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, &idle_cpu_adl_l),
1482-
X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N, &idle_cpu_adl_n),
1482+
X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, &idle_cpu_gmt),
14831483
X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, &idle_cpu_spr),
14841484
X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X, &idle_cpu_spr),
14851485
X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL, &idle_cpu_knl),
@@ -1979,7 +1979,7 @@ static void __init intel_idle_init_cstates_icpu(struct cpuidle_driver *drv)
19791979
break;
19801980
case INTEL_FAM6_ALDERLAKE:
19811981
case INTEL_FAM6_ALDERLAKE_L:
1982-
case INTEL_FAM6_ALDERLAKE_N:
1982+
case INTEL_FAM6_ATOM_GRACEMONT:
19831983
adl_idle_state_table_update();
19841984
break;
19851985
}

‎drivers/platform/x86/intel/pmc/core.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1123,7 +1123,7 @@ static const struct x86_cpu_id intel_pmc_core_ids[] = {
11231123
X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_L, icl_core_init),
11241124
X86_MATCH_INTEL_FAM6_MODEL(ROCKETLAKE, tgl_core_init),
11251125
X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, tgl_core_init),
1126-
X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N, tgl_core_init),
1126+
X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, tgl_core_init),
11271127
X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, adl_core_init),
11281128
X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, tgl_core_init),
11291129
X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, adl_core_init),

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