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Merge branches 'clk-samsung', 'clk-microchip', 'clk-imx', 'clk-amlogic' and 'clk-allwinner' into clk-next
* clk-samsung: clk: samsung: Introduce Exynos8895 clock driver clk: samsung: clk-pll: Add support for pll_{1051x,1052x} dt-bindings: clock: samsung: Add Exynos8895 SoC clk: samsung: gs101: make all ufs related clocks critical clk: samsung: exynosautov920: add peric1, misc and hsi0/1 clock support dt-bindings: clock: exynosautov920: add peric1, misc and hsi0/1 clock definitions clk: samsung: Fix out-of-bound access of of_match_node() dt-bindings: clock: samsung: remove define with number of clocks for FSD clk: samsung: fsd: do not define number of clocks in bindings clk: samsung: Fix errors reported by checkpatch clk: samsung: Fix block comment style warnings reported by checkpatch * clk-microchip: clk: lan966x: add support for lan969x SoC clock driver clk: lan966x: prepare driver for lan969x support clk: lan966x: make clk_names const char * const dt-bindings: clock: add support for lan969x * clk-imx: clk: imx: imx8-acm: Fix return value check in clk_imx_acm_attach_pm_domains() clk: imx: lpcg-scu: Skip HDMI LPCG clock save/restore clk: imx: clk-scu: fix clk enable state save and restore clk: imx: fracn-gppll: fix pll power up clk: imx: fracn-gppll: correct PLL initialization flow clk: imx: lpcg-scu: SW workaround for errata (e10858) clk: imx: add i.MX91 clk dt-bindings: clock: Add i.MX91 clock support dt-bindings: clock: imx93: Drop IMX93_CLK_END macro definition clk: imx93: Move IMX93_CLK_END macro to clk driver clk: imx95-blk-ctl: Add one clock gate for HSIO block dt-bindings: clock: nxp,imx95-blk-ctl: Add compatible string for i.MX95 HSIO BLK CTRL * clk-amlogic: clk: amlogic: axg-audio: fix Kconfig dependency on RESET_MESON_AUX clk: amlogic: axg-audio: use the auxiliary reset driver reset: amlogic: Fix small whitespace issue reset: amlogic: add auxiliary reset driver support reset: amlogic: split the device core and platform probe reset: amlogic: move drivers to a dedicated directory reset: amlogic: add reset status support reset: amlogic: use reset number instead of register count reset: amlogic: add driver parameters reset: amlogic: make parameters unsigned reset: amlogic: use generic data matching function reset: amlogic: convert driver to regmap dt-bindings: clock: convert amlogic,meson8b-clkc.txt to dtschema clk: meson: meson8b: remove spinlock clk: meson: mpll: Delete a useless spinlock from the MPLL clk: meson: s4: pll: fix frac maximum value for hifi_pll clk: meson: c3: pll: fix frac maximum value for hifi_pll clk: meson: Support PLL with fixed fractional denominators clk: meson: s4: pll: hifi_pll support fractional multiplier * clk-allwinner: clk: sunxi-ng: Use of_property_present() for non-boolean properties clk: sunxi-ng: d1: Fix PLL_AUDIO0 preset clk: sunxi-ng: Constify struct ccu_reset_map clk: sunxi-ng: h616: Add sigma-delta modulation settings for audio PLL
6 parents b2f8240 + 31062ea + 9d0af68 + dd8cbf4 + 681ed49 + ea1ba20 commit 0cf32b1

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‎Documentation/devicetree/bindings/clock/amlogic,meson8-clkc.yaml‎

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/amlogic,meson8-clkc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Amlogic Meson8, Meson8b and Meson8m2 Clock and Reset Controller
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maintainers:
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- Neil Armstrong <neil.armstrong@linaro.org>
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properties:
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compatible:
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oneOf:
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- enum:
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- amlogic,meson8-clkc
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- amlogic,meson8b-clkc
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- items:
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- const: amlogic,meson8m2-clkc
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- const: amlogic,meson8-clkc
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clocks:
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minItems: 2
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maxItems: 3
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clock-names:
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minItems: 2
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items:
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- const: xtal
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- const: ddr_pll
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- const: clk_32k
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'#clock-cells':
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const: 1
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'#reset-cells':
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const: 1
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required:
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- compatible
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- clocks
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- clock-names
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- '#reset-cells'
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additionalProperties: false

‎Documentation/devicetree/bindings/clock/amlogic,meson8b-clkc.txt‎

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‎Documentation/devicetree/bindings/clock/imx93-clock.yaml‎

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properties:
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compatible:
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enum:
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- fsl,imx91-ccm
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- fsl,imx93-ccm
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reg:

‎Documentation/devicetree/bindings/clock/microchip,lan966x-gck.yaml‎

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properties:
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compatible:
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const: microchip,lan966x-gck
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oneOf:
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- enum:
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- microchip,lan966x-gck
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- microchip,lan9691-gck
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- items:
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- enum:
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- microchip,lan9698-gck
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- microchip,lan9696-gck
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- microchip,lan9694-gck
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- microchip,lan9693-gck
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- microchip,lan9692-gck
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- const: microchip,lan9691-gck
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reg:
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minItems: 1

‎Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml‎

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compatible:
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items:
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- enum:
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- nxp,imx95-lvds-csr
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- nxp,imx95-display-csr
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- nxp,imx95-camera-csr
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- nxp,imx95-display-csr
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- nxp,imx95-hsio-blk-ctl
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- nxp,imx95-lvds-csr
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- nxp,imx95-netcmix-blk-ctrl
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- nxp,imx95-vpu-csr
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- const: syscon

‎Documentation/devicetree/bindings/clock/samsung,exynos8895-clock.yaml‎

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/samsung,exynos8895-clock.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Samsung Exynos8895 SoC clock controller
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maintainers:
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- Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
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- Chanwoo Choi <cw00.choi@samsung.com>
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- Krzysztof Kozlowski <krzk@kernel.org>
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description: |
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Exynos8895 clock controller is comprised of several CMU units, generating
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clocks for different domains. Those CMU units are modeled as separate device
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tree nodes, and might depend on each other. The root clock in that root tree
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is an external clock: OSCCLK (26 MHz). This external clock must be defined
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as a fixed-rate clock in dts.
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CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
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dividers; all other clocks of function blocks (other CMUs) are usually
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derived from CMU_TOP.
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Each clock is assigned an identifier and client nodes can use this identifier
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to specify the clock which they consume. All clocks available for usage
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in clock consumer nodes are defined as preprocessor macros in
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'include/dt-bindings/clock/samsung,exynos8895.h' header.
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properties:
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compatible:
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enum:
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- samsung,exynos8895-cmu-fsys0
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- samsung,exynos8895-cmu-fsys1
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- samsung,exynos8895-cmu-peric0
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- samsung,exynos8895-cmu-peric1
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- samsung,exynos8895-cmu-peris
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- samsung,exynos8895-cmu-top
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clocks:
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minItems: 1
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maxItems: 16
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clock-names:
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minItems: 1
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maxItems: 16
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"#clock-cells":
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const: 1
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reg:
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maxItems: 1
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required:
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- compatible
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- clocks
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- clock-names
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- reg
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- "#clock-cells"
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allOf:
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- if:
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properties:
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compatible:
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contains:
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const: samsung,exynos8895-cmu-fsys0
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then:
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properties:
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clocks:
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items:
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- description: External reference clock (26 MHz)
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- description: CMU_FSYS0 BUS clock (from CMU_TOP)
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- description: CMU_FSYS0 DPGTC clock (from CMU_TOP)
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- description: CMU_FSYS0 MMC_EMBD clock (from CMU_TOP)
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- description: CMU_FSYS0 UFS_EMBD clock (from CMU_TOP)
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- description: CMU_FSYS0 USBDRD30 clock (from CMU_TOP)
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clock-names:
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items:
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- const: oscclk
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- const: bus
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- const: dpgtc
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- const: mmc
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- const: ufs
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- const: usbdrd30
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- if:
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properties:
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compatible:
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contains:
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const: samsung,exynos8895-cmu-fsys1
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then:
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properties:
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clocks:
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items:
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- description: External reference clock (26 MHz)
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- description: CMU_FSYS1 BUS clock (from CMU_TOP)
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- description: CMU_FSYS1 PCIE clock (from CMU_TOP)
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- description: CMU_FSYS1 UFS_CARD clock (from CMU_TOP)
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- description: CMU_FSYS1 MMC_CARD clock (from CMU_TOP)
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clock-names:
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items:
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- const: oscclk
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- const: bus
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- const: pcie
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- const: ufs
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- const: mmc
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- if:
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properties:
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compatible:
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contains:
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const: samsung,exynos8895-cmu-peric0
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then:
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properties:
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clocks:
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items:
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- description: External reference clock (26 MHz)
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- description: CMU_PERIC0 BUS clock (from CMU_TOP)
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- description: CMU_PERIC0 UART_DBG clock (from CMU_TOP)
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- description: CMU_PERIC0 USI00 clock (from CMU_TOP)
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- description: CMU_PERIC0 USI01 clock (from CMU_TOP)
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- description: CMU_PERIC0 USI02 clock (from CMU_TOP)
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- description: CMU_PERIC0 USI03 clock (from CMU_TOP)
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clock-names:
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items:
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- const: oscclk
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- const: bus
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- const: uart
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- const: usi0
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- const: usi1
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- const: usi2
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- const: usi3
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- if:
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properties:
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compatible:
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contains:
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const: samsung,exynos8895-cmu-peric1
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then:
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properties:
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clocks:
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items:
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- description: External reference clock (26 MHz)
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- description: CMU_PERIC1 BUS clock (from CMU_TOP)
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- description: CMU_PERIC1 SPEEDY2 clock (from CMU_TOP)
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- description: CMU_PERIC1 SPI_CAM0 clock (from CMU_TOP)
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- description: CMU_PERIC1 SPI_CAM1 clock (from CMU_TOP)
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- description: CMU_PERIC1 UART_BT clock (from CMU_TOP)
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- description: CMU_PERIC1 USI04 clock (from CMU_TOP)
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- description: CMU_PERIC1 USI05 clock (from CMU_TOP)
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- description: CMU_PERIC1 USI06 clock (from CMU_TOP)
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- description: CMU_PERIC1 USI07 clock (from CMU_TOP)
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- description: CMU_PERIC1 USI08 clock (from CMU_TOP)
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- description: CMU_PERIC1 USI09 clock (from CMU_TOP)
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- description: CMU_PERIC1 USI10 clock (from CMU_TOP)
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- description: CMU_PERIC1 USI11 clock (from CMU_TOP)
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- description: CMU_PERIC1 USI12 clock (from CMU_TOP)
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- description: CMU_PERIC1 USI13 clock (from CMU_TOP)
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clock-names:
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items:
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- const: oscclk
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- const: bus
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- const: speedy
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- const: cam0
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- const: cam1
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- const: uart
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- const: usi4
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- const: usi5
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- const: usi6
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- const: usi7
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- const: usi8
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- const: usi9
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- const: usi10
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- const: usi11
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- const: usi12
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- const: usi13
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- if:
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properties:
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compatible:
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contains:
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const: samsung,exynos8895-cmu-peris
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then:
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properties:
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clocks:
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items:
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- description: External reference clock (26 MHz)
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- description: CMU_PERIS BUS clock (from CMU_TOP)
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clock-names:
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items:
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- const: oscclk
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- const: bus
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- if:
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properties:
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compatible:
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contains:
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const: samsung,exynos8895-cmu-top
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then:
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properties:
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clocks:
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items:
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- description: External reference clock (26 MHz)
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clock-names:
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items:
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- const: oscclk
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/samsung,exynos8895.h>
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cmu_fsys1: clock-controller@11400000 {
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compatible = "samsung,exynos8895-cmu-fsys1";
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reg = <0x11400000 0x8000>;
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#clock-cells = <1>;
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clocks = <&oscclk>,
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<&cmu_top CLK_DOUT_CMU_FSYS1_BUS>,
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<&cmu_top CLK_DOUT_CMU_FSYS1_PCIE>,
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<&cmu_top CLK_DOUT_CMU_FSYS1_UFS_CARD>,
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<&cmu_top CLK_DOUT_CMU_FSYS1_MMC_CARD>;
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clock-names = "oscclk", "bus", "pcie", "ufs", "mmc";
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};
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...

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