Feat: start work for CAS ops

Author: RDambrosio016

crates/cuda_std/CHANGELOG.md

@@ -6,6 +6,7 @@ Notable changes to this project will be documented in this file.
 
 - Added warp shuffles, matches, reductions, and votes in the `warp` module.
 - Added `activemask` in the `warp` module to query a mask of the active threads.
+- Fixed `lane_id` generating invalid ptx.
 
 ## 0.2.2 - 2/7/22
 

crates/cuda_std/src/atomic.rs

@@ -61,6 +61,18 @@ macro_rules! safety_doc {
     };
 }
 
+// taken from stdlib compare_and_swap docs
+fn double_ordering_from_one(ordering: Ordering) -> (Ordering, Ordering) {
+    match ordering {
+        Ordering::Relaxed => (Ordering::Relaxed, Ordering::Relaxed),
+        Ordering::Acquire => (Ordering::Acquire, Ordering::Acquire),
+        Ordering::Release => (Ordering::Release, Ordering::Relaxed),
+        Ordering::AcqRel => (Ordering::AcqRel, Ordering::Acquire),
+        Ordering::SeqCst => (Ordering::SeqCst, Ordering::SeqCst),
+        _ => unreachable!(),
+    }
+}
+
 macro_rules! atomic_float {
     ($float_ty:ident, $atomic_ty:ident, $align:tt, $scope:ident, $width:tt $(,$unsafety:ident)?) => {
         #[doc = concat!("A ", stringify!($width), "-bit float type which can be safely shared between threads and synchronizes across ", scope_doc!($scope))]
@@ -220,6 +232,17 @@ macro_rules! atomic_float {
                     #[cfg(not(target_os = "cuda"))]
                     self.as_atomic_bits().store(val.to_bits(), order);
                 }
+
+                // $(#[doc = safety_doc!($unsafety)])?
+                // pub $($unsafety)? fn compare_and_swap(&self, current: f32, new: f32, order: Ordering) -> Result<$float_ty, $float_ty> {
+                //     #[cfg(target_os = "cuda")]
+                //     unsafe {
+                //         let res = mid::[<atomic_compare_and_swap_ $float_ty _ $scope>](self.v.get().cast(), order, current, new);
+                //     }
+
+                //     #[cfg(not(target_os = "cuda"))]
+                //     self.as_atomic_bits().compare_exchange
+                // }
             }
         }
     };

crates/cuda_std/src/atomic/mid.rs

@@ -251,3 +251,67 @@ fetch_ops_1_param! {
     max => (u32, u64, i32, i64),
     exch => (u32, u64, i32, i64, f32, f64),
 }
+
+macro_rules! inner_cas {
+    ($($type:ty, $scope:ident),* $(,)?) => {
+        $(
+            paste! {
+                #[$crate::gpu_only]
+                #[allow(clippy::missing_safety_doc)]
+                pub unsafe fn [<atomic_compare_and_swap_ $type _ $scope>](ptr: *mut $type, current: $type, new: $type, ordering: Ordering) -> $type {
+                    if ge_sm70() {
+                        match ordering {
+                            SeqCst => {
+                                intrinsics::[<fence_sc_ $scope>]();
+                                intrinsics::[<atomic_fetch_cas_acquire_ $type _ $scope>](ptr, current, new)
+                            },
+                            Acquire => intrinsics::[<atomic_fetch_cas_acquire_ $type _ $scope>](ptr, current, new),
+                            AcqRel => intrinsics::[<atomic_fetch_cas_acqrel_ $type _ $scope>](ptr, current, new),
+                            Release => intrinsics::[<atomic_fetch_cas_release_ $type _ $scope>](ptr, current, new),
+                            Relaxed => intrinsics::[<atomic_fetch_cas_relaxed_ $type _ $scope>](ptr, current, new),
+                            _ => unimplemented!("Weird ordering added by core")
+                        }
+                    } else {
+                        match ordering {
+                            SeqCst | AcqRel => {
+                                intrinsics::[<membar_ $scope>]();
+                                let val = intrinsics::[<atomic_fetch_cas_volatile_ $type _ $scope>](ptr, current, new);
+                                intrinsics::[<membar_ $scope>]();
+                                val
+                            },
+                            Acquire => {
+                                let val = intrinsics::[<atomic_fetch_cas_volatile_ $type _ $scope>](ptr, current, new);
+                                intrinsics::[<membar_ $scope>]();
+                                val
+                            },
+                            Release => {
+                                intrinsics::[<membar_ $scope>]();
+                                intrinsics::[<atomic_fetch_cas_volatile_ $type _ $scope>](ptr, current, new)
+                            },
+                            Relaxed => {
+                                intrinsics::[<atomic_fetch_cas_volatile_ $type _ $scope>](ptr, current, new)
+                            },
+                            _ => unimplemented!("Weird ordering added by core")
+                        }
+                    }
+                }
+            }
+        )*
+    }
+}
+
+macro_rules! impl_cas {
+    ($($type:ident),* $(,)?) => {
+        $(
+            inner_cas!(
+                    $type, block,
+                    $type, device,
+                    $type, system,
+            );
+        )*
+    };
+}
+
+impl_cas! {
+    u32, u64, i32, i64, f32, f64
+}