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shtaxxxshtaxxx
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Renamed argument names to specify bank addressing
1 parent ef7d606 commit a2bdd0c

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+40
-38
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1 file changed

+40
-38
lines changed

‎veriloggen/thread/axim.py‎

Lines changed: 40 additions & 38 deletions
Original file line numberDiff line numberDiff line change
@@ -363,22 +363,22 @@ def dma_write_async(self, fsm, ram, local_addr, global_addr, local_size,
363363
local_stride, local_blocksize, port)
364364

365365
# DMA for each bank
366-
def dma_read_bank(self, fsm, ram, bank, local_addr, global_addr, local_size,
367-
local_stride=1, port=0):
366+
def dma_read_bank(self, fsm, ram, bank, local_bank_addr, global_addr, local_bank_size,
367+
local_bank_stride=1, port=0):
368368

369-
self._dma_read_bank(fsm, ram, bank, local_addr, global_addr, local_size,
370-
local_stride, port)
369+
self._dma_read_bank(fsm, ram, bank, local_bank_addr, global_addr, local_bank_size,
370+
local_bank_stride, port)
371371

372372
self.dma_wait_read(fsm)
373373

374-
def dma_read_bank_async(self, fsm, ram, bank, local_addr, global_addr, local_size,
375-
local_stride=1, port=0):
374+
def dma_read_bank_async(self, fsm, ram, bank, local_bank_addr, global_addr, local_bank_size,
375+
local_bank_stride=1, port=0):
376376

377-
self._dma_read_bank(fsm, ram, bank, local_addr, global_addr, local_size,
378-
local_stride, port)
377+
self._dma_read_bank(fsm, ram, bank, local_bank_addr, global_addr, local_bank_size,
378+
local_bank_stride, port)
379379

380-
def _dma_read_bank(self, fsm, ram, bank, local_addr, global_addr, local_size,
381-
local_stride=1, port=0):
380+
def _dma_read_bank(self, fsm, ram, bank, local_bank_addr, global_addr, local_bank_size,
381+
local_bank_stride=1, port=0):
382382

383383
if isinstance(ram, (tuple, list)):
384384
ram = to_multibank_ram(ram)
@@ -394,8 +394,8 @@ def _dma_read_bank(self, fsm, ram, bank, local_addr, global_addr, local_size,
394394
for i, _ram in enumerate(ram.rams):
395395
starts.append(fsm.current)
396396
local_blocksize = 1
397-
self._dma_read(fsm, _ram, local_addr, global_addr, local_size,
398-
local_stride, local_blocksize, port)
397+
self._dma_read(fsm, _ram, local_bank_addr, global_addr, local_bank_size,
398+
local_bank_stride, local_blocksize, port)
399399
ends.append(fsm.current)
400400
fsm.set_index(fsm.current + 1)
401401

@@ -405,22 +405,22 @@ def _dma_read_bank(self, fsm, ram, bank, local_addr, global_addr, local_size,
405405
fsm.goto_from(check, s, cond=bank == i)
406406
fsm.goto_from(e, fin)
407407

408-
def dma_write_bank(self, fsm, ram, bank, local_addr, global_addr, local_size,
409-
local_stride=1, port=0):
408+
def dma_write_bank(self, fsm, ram, bank, local_bank_addr, global_addr, local_bank_size,
409+
local_bank_stride=1, port=0):
410410

411-
self._dma_write_bank(fsm, ram, bank, local_addr, global_addr, local_size,
412-
local_stride, port)
411+
self._dma_write_bank(fsm, ram, bank, local_bank_addr, global_addr, local_bank_size,
412+
local_bank_stride, port)
413413

414414
self.dma_wait_write(fsm)
415415

416-
def dma_write_bank_async(self, fsm, ram, bank, local_addr, global_addr, local_size,
417-
local_stride=1, port=0):
416+
def dma_write_bank_async(self, fsm, ram, bank, local_bank_addr, global_addr, local_bank_size,
417+
local_bank_stride=1, port=0):
418418

419-
self._dma_write_bank(fsm, ram, bank, local_addr, global_addr, local_size,
420-
local_stride, port)
419+
self._dma_write_bank(fsm, ram, bank, local_bank_addr, global_addr, local_bank_size,
420+
local_bank_stride, port)
421421

422-
def _dma_write_bank(self, fsm, ram, bank, local_addr, global_addr, local_size,
423-
local_stride=1, port=0):
422+
def _dma_write_bank(self, fsm, ram, bank, local_bank_addr, global_addr, local_bank_size,
423+
local_bank_stride=1, port=0):
424424

425425
if isinstance(ram, (tuple, list)):
426426
ram = to_multibank_ram(ram)
@@ -436,8 +436,8 @@ def _dma_write_bank(self, fsm, ram, bank, local_addr, global_addr, local_size,
436436
for i, _ram in enumerate(ram.rams):
437437
starts.append(fsm.current)
438438
local_blocksize = 1
439-
self._dma_write(fsm, _ram, local_addr, global_addr, local_size,
440-
local_stride, local_blocksize, port)
439+
self._dma_write(fsm, _ram, local_bank_addr, global_addr, local_bank_size,
440+
local_bank_stride, local_blocksize, port)
441441
ends.append(fsm.current)
442442
fsm.set_index(fsm.current + 1)
443443

@@ -448,21 +448,21 @@ def _dma_write_bank(self, fsm, ram, bank, local_addr, global_addr, local_size,
448448
fsm.goto_from(e, fin)
449449

450450
# DMA with block interleave
451-
def dma_read_block(self, fsm, ram, local_addr, global_addr, local_size,
451+
def dma_read_block(self, fsm, ram, local_bank_addr, global_addr, local_size,
452452
local_blocksize=1, local_stride=None, port=0):
453453

454-
self._dma_read_block(fsm, ram, local_addr, global_addr, local_size,
454+
self._dma_read_block(fsm, ram, local_bank_addr, global_addr, local_size,
455455
local_blocksize, local_stride, port)
456456

457457
self.dma_wait_read(fsm)
458458

459-
def dma_read_block_async(self, fsm, ram, local_addr, global_addr, local_size,
459+
def dma_read_block_async(self, fsm, ram, local_bank_addr, global_addr, local_size,
460460
local_blocksize=1, local_stride=None, port=0):
461461

462-
self._dma_read_block(fsm, ram, local_addr, global_addr, local_size,
462+
self._dma_read_block(fsm, ram, local_bank_addr, global_addr, local_size,
463463
local_blocksize, local_stride, port)
464464

465-
def _dma_read_block(self, fsm, ram, local_addr, global_addr, local_size,
465+
def _dma_read_block(self, fsm, ram, local_bank_addr, global_addr, local_size,
466466
local_blocksize=1, local_stride=None, port=0):
467467

468468
if isinstance(ram, (tuple, list)):
@@ -505,24 +505,24 @@ def _dma_read_block(self, fsm, ram, local_addr, global_addr, local_size,
505505
local_stride = 1
506506

507507
ram_method = ram.write_burst_block
508-
self._dma_read(fsm, ram, local_addr, global_addr, local_size,
508+
self._dma_read(fsm, ram, local_bank_addr, global_addr, local_size,
509509
local_stride, local_blocksize, port, ram_method)
510510

511-
def dma_write_block(self, fsm, ram, local_addr, global_addr, local_size,
511+
def dma_write_block(self, fsm, ram, local_bank_addr, global_addr, local_size,
512512
local_blocksize=1, local_stride=None, port=0):
513513

514-
self._dma_write_block(fsm, ram, local_addr, global_addr, local_size,
514+
self._dma_write_block(fsm, ram, local_bank_addr, global_addr, local_size,
515515
local_blocksize, local_stride, port)
516516

517517
self.dma_wait_write(fsm)
518518

519-
def dma_write_block_async(self, fsm, ram, local_addr, global_addr, local_size,
519+
def dma_write_block_async(self, fsm, ram, local_bank_addr, global_addr, local_size,
520520
local_blocksize=1, local_stride=None, port=0):
521521

522-
self._dma_write_block(fsm, ram, local_addr, global_addr, local_size,
522+
self._dma_write_block(fsm, ram, local_bank_addr, global_addr, local_size,
523523
local_blocksize, local_stride, port)
524524

525-
def _dma_write_block(self, fsm, ram, local_addr, global_addr, local_size,
525+
def _dma_write_block(self, fsm, ram, local_bank_addr, global_addr, local_size,
526526
local_blocksize=1, local_stride=None, port=0):
527527

528528
if isinstance(ram, (tuple, list)):
@@ -565,7 +565,7 @@ def _dma_write_block(self, fsm, ram, local_addr, global_addr, local_size,
565565
local_stride = 1
566566

567567
ram_method = ram.read_burst_block
568-
self._dma_write(fsm, ram, local_addr, global_addr, local_size,
568+
self._dma_write(fsm, ram, local_bank_addr, global_addr, local_size,
569569
local_stride, local_blocksize, port, ram_method)
570570

571571
# multi-bank packed DMA
@@ -1648,7 +1648,8 @@ def pack_read_req(self, op_sel, local_addr, local_stride, local_size, local_bloc
16481648
_local_blocksize.assign(local_blocksize)
16491649
packed = self.m.TmpWire(self.op_sel_width + self.addrwidth * 4 + 1,
16501650
prefix='pack_read_req_packed')
1651-
packed.assign(vtypes.Cat(_op_sel, _local_addr, _local_stride, _local_size, _local_blocksize))
1651+
packed.assign(
1652+
vtypes.Cat(_op_sel, _local_addr, _local_stride, _local_size, _local_blocksize))
16521653
return packed
16531654

16541655
def unpack_read_req(self, v):
@@ -1682,7 +1683,8 @@ def pack_write_req(self, op_sel, local_addr, local_stride, size, local_blocksize
16821683
_local_blocksize.assign(local_blocksize)
16831684
packed = self.m.TmpWire(self.op_sel_width + self.addrwidth * 4 + 1,
16841685
prefix='pack_write_req_packed')
1685-
packed.assign(vtypes.Cat(_op_sel, _local_addr, _local_stride, _size, _local_blocksize))
1686+
packed.assign(
1687+
vtypes.Cat(_op_sel, _local_addr, _local_stride, _size, _local_blocksize))
16861688
return packed
16871689

16881690
def unpack_write_req(self, v):

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