tests/lib_dataflow_ is updated: pipe -> df

Author: shtaxxx

tests/lib_dataflow_/acc_add/lib_dataflow_acc_add.py

@@ -14,13 +14,13 @@ def mkLed():
     y = m.Output('y', 32)
     prst = m.Input('prst')
 
-    pipe = lib.Dataflow(m, 'pipe', clk, rst)
+    df = lib.Dataflow(m, 'df', clk, rst)
 
-    px = pipe.input(x)
-    psum = pipe.acc_add(px, initval=0, resetcond=prst)
+    px = df.input(x)
+    psum = df.acc_add(px, initval=0, resetcond=prst)
     psum.output(y)
 
-    pipe.make_always()
+    df.make_always()
 
     return m
 

tests/lib_dataflow_/acc_add/test_lib_dataflow_acc_add.py

@@ -122,20 +122,20 @@
   input prst
 );
 
-  reg [32-1:0] _pipe_data_0;
-  reg [32-1:0] _pipe_data_1;
-  assign y = _pipe_data_1;
+  reg [32-1:0] _df_data_0;
+  reg [32-1:0] _df_data_1;
+  assign y = _df_data_1;
 
   always @(posedge CLK) begin
     if(RST) begin
-      _pipe_data_0 <= 0;
-      _pipe_data_1 <= 0;
+      _df_data_0 <= 0;
+      _df_data_1 <= 0;
     end else begin
-      _pipe_data_0 <= _pipe_data_0 + x;
+      _df_data_0 <= _df_data_0 + x;
       if(prst) begin
-        _pipe_data_0 <= 0;
+        _df_data_0 <= 0;
       end 
-      _pipe_data_1 <= _pipe_data_0;
+      _df_data_1 <= _df_data_0;
     end
   end
 

tests/lib_dataflow_/acc_add_valid/lib_dataflow_acc_add_valid.py

@@ -16,13 +16,13 @@ def mkLed():
     vy = m.Output('vy')
     prst = m.Input('prst')
 
-    pipe = lib.Dataflow(m, 'pipe', clk, rst)
+    df = lib.Dataflow(m, 'df', clk, rst)
 
-    px = pipe.input(x, valid=vx)
-    psum = pipe.acc_add(px, initval=0, resetcond=prst)
+    px = df.input(x, valid=vx)
+    psum = df.acc_add(px, initval=0, resetcond=prst)
     psum.output(y, valid=vy)
 
-    pipe.make_always()
+    df.make_always()
 
     return m
 

tests/lib_dataflow_/acc_add_valid/test_lib_dataflow_acc_add_valid.py

@@ -111,34 +111,34 @@
   input prst
 );
 
-  reg [32-1:0] _pipe_data_0;
-  reg _pipe_valid_0;
-  reg [32-1:0] _pipe_data_1;
-  reg _pipe_valid_1;
-  assign y = _pipe_data_1;
-  assign vy = _pipe_valid_1;
+  reg [32-1:0] _df_data_0;
+  reg _df_valid_0;
+  reg [32-1:0] _df_data_1;
+  reg _df_valid_1;
+  assign y = _df_data_1;
+  assign vy = _df_valid_1;
 
   always @(posedge CLK) begin
     if(RST) begin
-      _pipe_data_0 <= 0;
-      _pipe_valid_0 <= 0;
-      _pipe_data_1 <= 0;
-      _pipe_valid_1 <= 0;
+      _df_data_0 <= 0;
+      _df_valid_0 <= 0;
+      _df_data_1 <= 0;
+      _df_valid_1 <= 0;
     end else begin
       if(vx) begin
-        _pipe_data_0 <= _pipe_data_0 + x;
+        _df_data_0 <= _df_data_0 + x;
       end 
-      _pipe_valid_0 <= vx;
+      _df_valid_0 <= vx;
       if(prst) begin
-        _pipe_data_0 <= 0;
+        _df_data_0 <= 0;
       end 
       if(prst) begin
-        _pipe_valid_0 <= 0;
+        _df_valid_0 <= 0;
       end 
-      if(_pipe_valid_0) begin
-        _pipe_data_1 <= _pipe_data_0;
+      if(_df_valid_0) begin
+        _df_data_1 <= _df_data_0;
       end 
-      _pipe_valid_1 <= _pipe_valid_0;
+      _df_valid_1 <= _df_valid_0;
     end
   end
 

tests/lib_dataflow_/acc_add_validready/lib_dataflow_acc_add_validready.py

@@ -18,13 +18,13 @@ def mkLed():
     ry = m.Input('ry')
     prst = m.Input('prst')
 
-    pipe = lib.Dataflow(m, 'pipe', clk, rst)
+    df = lib.Dataflow(m, 'df', clk, rst)
 
-    px = pipe.input(x, valid=vx, ready=rx)
-    psum = pipe.acc_add(px, initval=0, resetcond=prst)
+    px = df.input(x, valid=vx, ready=rx)
+    psum = df.acc_add(px, initval=0, resetcond=prst)
     psum.output(y, valid=vy, ready=ry)
 
-    pipe.make_always()
+    df.make_always()
 
     return m
 

tests/lib_dataflow_/acc_add_validready/test_lib_dataflow_acc_add_validready.py

@@ -212,42 +212,42 @@
   input prst
 );
 
-  assign rx = (_pipe_ready_0 || (!_pipe_valid_0));
-  reg [32-1:0] _pipe_data_0;
-  reg _pipe_valid_0;
-  wire _pipe_ready_0;
-  assign _pipe_ready_0 = (_pipe_ready_1 || (!_pipe_valid_1));
-  reg [32-1:0] _pipe_data_1;
-  reg _pipe_valid_1;
-  wire _pipe_ready_1;
-  assign _pipe_ready_1 = ry;
-  assign y = _pipe_data_1;
-  assign vy = _pipe_valid_1;
+  assign rx = (_df_ready_0 || (!_df_valid_0));
+  reg [32-1:0] _df_data_0;
+  reg _df_valid_0;
+  wire _df_ready_0;
+  assign _df_ready_0 = (_df_ready_1 || (!_df_valid_1));
+  reg [32-1:0] _df_data_1;
+  reg _df_valid_1;
+  wire _df_ready_1;
+  assign _df_ready_1 = ry;
+  assign y = _df_data_1;
+  assign vy = _df_valid_1;
 
   always @(posedge CLK) begin
     if(RST) begin
-      _pipe_data_0 <= 0;
-      _pipe_valid_0 <= 0;
-      _pipe_data_1 <= 0;
-      _pipe_valid_1 <= 0;
+      _df_data_0 <= 0;
+      _df_valid_0 <= 0;
+      _df_data_1 <= 0;
+      _df_valid_1 <= 0;
     end else begin
-      if(((vx && rx) && (_pipe_ready_0 || (!_pipe_valid_0)))) begin
-        _pipe_data_0 <= (_pipe_data_0 + x);
+      if(((vx && rx) && (_df_ready_0 || (!_df_valid_0)))) begin
+        _df_data_0 <= (_df_data_0 + x);
       end 
-      if((_pipe_ready_0 || (!_pipe_valid_0))) begin
-        _pipe_valid_0 <= (vx && rx);
+      if((_df_ready_0 || (!_df_valid_0))) begin
+        _df_valid_0 <= (vx && rx);
       end 
       if(prst) begin
-        _pipe_data_0 <= 0;
+        _df_data_0 <= 0;
       end 
       if(prst) begin
-        _pipe_valid_0 <= 0;
+        _df_valid_0 <= 0;
       end 
-      if(((_pipe_valid_0 && _pipe_ready_0) && (_pipe_ready_1 || (!_pipe_valid_1)))) begin
-        _pipe_data_1 <= _pipe_data_0;
+      if(((_df_valid_0 && _df_ready_0) && (_df_ready_1 || (!_df_valid_1)))) begin
+        _df_data_1 <= _df_data_0;
       end 
-      if((_pipe_ready_1 || (!_pipe_valid_1))) begin
-        _pipe_valid_1 <= (_pipe_valid_0 && _pipe_ready_0);
+      if((_df_ready_1 || (!_df_valid_1))) begin
+        _df_valid_1 <= (_df_valid_0 && _df_ready_0);
       end 
     end
   end

tests/lib_dataflow_/multi_input/lib_dataflow_multi_input.py

@@ -23,14 +23,14 @@ def mkLed():
     vz = m.Output('vz')
     rz = m.Input('rz')
 
-    pipe = lib.Dataflow(m, 'pipe', clk, rst)
+    df = lib.Dataflow(m, 'df', clk, rst)
 
-    px = pipe.input(x, valid=vx, ready=rx)
-    py = pipe.input(y, valid=vy, ready=ry)
-    pz = pipe(px + py)
+    px = df.input(x, valid=vx, ready=rx)
+    py = df.input(y, valid=vy, ready=ry)
+    pz = df(px + py)
     pz.output(z, valid=vz, ready=rz)
 
-    pipe.make_always()
+    df.make_always()
 
     return m
 

tests/lib_dataflow_/multi_input/test_lib_dataflow_multi_input.py

@@ -258,37 +258,37 @@
   input rz
 );
 
-  assign rx = (_pipe_ready_0 || (!_pipe_valid_0));
-  assign ry = (_pipe_ready_0 || (!_pipe_valid_0));
-  reg [32-1:0] _pipe_data_0;
-  reg _pipe_valid_0;
-  wire _pipe_ready_0;
-  assign _pipe_ready_0 = (_pipe_ready_1 || (!_pipe_valid_1));
-  reg [32-1:0] _pipe_data_1;
-  reg _pipe_valid_1;
-  wire _pipe_ready_1;
-  assign _pipe_ready_1 = rz;
-  assign z = _pipe_data_1;
-  assign vz = _pipe_valid_1;
+  assign rx = (_df_ready_0 || (!_df_valid_0));
+  assign ry = (_df_ready_0 || (!_df_valid_0));
+  reg [32-1:0] _df_data_0;
+  reg _df_valid_0;
+  wire _df_ready_0;
+  assign _df_ready_0 = (_df_ready_1 || (!_df_valid_1));
+  reg [32-1:0] _df_data_1;
+  reg _df_valid_1;
+  wire _df_ready_1;
+  assign _df_ready_1 = rz;
+  assign z = _df_data_1;
+  assign vz = _df_valid_1;
 
   always @(posedge CLK) begin
     if(RST) begin
-      _pipe_data_0 <= 0;
-      _pipe_valid_0 <= 0;
-      _pipe_data_1 <= 0;
-      _pipe_valid_1 <= 0;
+      _df_data_0 <= 0;
+      _df_valid_0 <= 0;
+      _df_data_1 <= 0;
+      _df_valid_1 <= 0;
     end else begin
-      if((((vx && rx) && (vy && ry)) && (_pipe_ready_0 || (!_pipe_valid_0)))) begin
-        _pipe_data_0 <= (x + y);
+      if((((vx && rx) && (vy && ry)) && (_df_ready_0 || (!_df_valid_0)))) begin
+        _df_data_0 <= (x + y);
       end 
-      if((_pipe_ready_0 || (!_pipe_valid_0))) begin
-        _pipe_valid_0 <= ((vx && rx) && (vy && ry));
+      if((_df_ready_0 || (!_df_valid_0))) begin
+        _df_valid_0 <= ((vx && rx) && (vy && ry));
       end 
-      if(((_pipe_valid_0 && _pipe_ready_0) && (_pipe_ready_1 || (!_pipe_valid_1)))) begin
-        _pipe_data_1 <= _pipe_data_0;
+      if(((_df_valid_0 && _df_ready_0) && (_df_ready_1 || (!_df_valid_1)))) begin
+        _df_data_1 <= _df_data_0;
       end 
-      if((_pipe_ready_1 || (!_pipe_valid_1))) begin
-        _pipe_valid_1 <= (_pipe_valid_0 && _pipe_ready_0);
+      if((_df_ready_1 || (!_df_valid_1))) begin
+        _df_valid_1 <= (_df_valid_0 && _df_ready_0);
       end 
     end
   end

tests/lib_dataflow_/multi_output/lib_dataflow_multi_output.py

@@ -27,16 +27,16 @@ def mkLed():
     va = m.Output('va')
     ra = m.Input('ra')
 
-    pipe = lib.Dataflow(m, 'pipe', clk, rst)
+    df = lib.Dataflow(m, 'df', clk, rst)
 
-    px = pipe.input(x, valid=vx, ready=rx)
-    py = pipe.input(y, valid=vy, ready=ry)
-    pz = pipe(px + py)
-    pa = pipe(py - px)
+    px = df.input(x, valid=vx, ready=rx)
+    py = df.input(y, valid=vy, ready=ry)
+    pz = df(px + py)
+    pa = df(py - px)
     pz.output(z, valid=vz, ready=rz)
     pa.output(a, valid=va, ready=ra)
 
-    pipe.make_always()
+    df.make_always()
 
     return m