stub_ test is updated. while and class are renamed with underscore.

Author: shtaxxx

tests/class/Makefile renamed to tests/_class/Makefile

@@ -2,6 +2,9 @@
 import os
 import collections
 
+# the next line can be removed after installation
+sys.path.insert(0, os.path.dirname(os.path.dirname(os.path.dirname(os.path.dirname(os.path.abspath(__file__))))))
+
 from veriloggen import *
 
 def mkLed():

tests/class/_class.py renamed to tests/_class/_class.py

@@ -1,4 +1,4 @@
-import led
+import stub__class
 
 expected_verilog = """
 module top #
@@ -23,9 +23,9 @@
 endmodule
 """
 
-def test_led():
-    top_module = led.mkTop()
-    top_code = top_module.to_verilog()
+def test():
+    test_module = stub__class.mkTop()
+    code = test_module.to_verilog()
 
     from pyverilog.vparser.parser import VerilogParser
     from pyverilog.ast_code_generator.codegen import ASTCodeGenerator
@@ -34,4 +34,4 @@ def test_led():
     codegen = ASTCodeGenerator()
     expected_code = codegen.visit(expected_ast)
 
-    assert(expected_code == top_code)
+    assert(expected_code == code)

tests/class/test_class.py renamed to tests/_class/test__class.py

@@ -2,6 +2,9 @@
 import os
 import collections
 
+# the next line can be removed after installation
+sys.path.insert(0, os.path.dirname(os.path.dirname(os.path.dirname(os.path.dirname(os.path.abspath(__file__))))))
+
 from veriloggen import *
 
 def mkLed():