rename

Author: shtaxxx

examples/thread_stream_axi_stream/Makefile renamed to examples/thread_stream_axi_stream_fifo/Makefile

@@ -3,16 +3,16 @@
 
 import os
 import veriloggen
-import thread_stream_axi_stream
+import thread_stream_axi_stream_fifo
 
 
 def test(request):
     veriloggen.reset()
 
     simtype = request.config.getoption('--sim')
 
-    rslt = thread_stream_axi_stream.run(filename=None, simtype=simtype,
-                                        outputfile=os.path.splitext(os.path.basename(__file__))[0] + '.out')
+    rslt = thread_stream_axi_stream_fifo.run(filename=None, simtype=simtype,
+                                             outputfile=os.path.splitext(os.path.basename(__file__))[0] + '.out')
 
     verify_rslt = rslt.splitlines()[-1]
     assert(verify_rslt == '# verify: PASSED')