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lines changed Original file line number Diff line number Diff line change @@ -62,6 +62,7 @@ import sys
6262import os
6363
6464from veriloggen import *
65+
6566def mkLed ():
6667 m = Module(' blinkled' )
6768 width = m.Parameter(' WIDTH' , 8 )
@@ -70,16 +71,21 @@ def mkLed():
7071 led = m.OutputReg(' LED' , width)
7172 count = m.Reg(' count' , 32 )
7273
73- m.Always(Posedge(clk),
74- ( If(rst,
75- ( count.set(0 ), ),
76- ( count.set(count + 1 ), )), ))
74+ m.Always(Posedge(clk))(
75+ If(rst)(
76+ count(0 )
77+ ).els(
78+ count(count + 1 )
79+ ))
7780
78- m.Always(Posedge(clk),
79- ( If(rst,
80- ( led.set(0 ), ),
81- ( If(count == 1024 - 1 ,
82- ( led.set(led + 1 ), )))), ))
81+ m.Always(Posedge(clk))(
82+ If(rst)(
83+ led(0 )
84+ ).els(
85+ If(count == 1024 - 1 )(
86+ led(led + 1 )
87+ )
88+ ))
8389
8490 return m
8591
Original file line number Diff line number Diff line change @@ -73,6 +73,7 @@ Python as below. A blinking LED hardware is modeled in Python.
7373 import os
7474
7575 from veriloggen import *
76+
7677 def mkLed ():
7778 m = Module(' blinkled' )
7879 width = m.Parameter(' WIDTH' , 8 )
@@ -81,16 +82,21 @@ Python as below. A blinking LED hardware is modeled in Python.
8182 led = m.OutputReg(' LED' , width)
8283 count = m.Reg(' count' , 32 )
8384
84- m.Always(Posedge(clk),
85- ( If(rst,
86- ( count.set(0 ), ),
87- ( count.set(count + 1 ), )), ))
85+ m.Always(Posedge(clk))(
86+ If(rst)(
87+ count(0 )
88+ ).els(
89+ count(count + 1 )
90+ ))
8891
89- m.Always(Posedge(clk),
90- ( If(rst,
91- ( led.set(0 ), ),
92- ( If(count == 1024 - 1 ,
93- ( led.set(led + 1 ), )))), ))
92+ m.Always(Posedge(clk))(
93+ If(rst)(
94+ led(0 )
95+ ).els(
96+ If(count == 1024 - 1 )(
97+ led(led + 1 )
98+ )
99+ ))
94100
95101 return m
96102
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