global value access

shtaxxx · shtaxxx · commit 011e9ca34ddb · 2017-05-02T13:51:45.000+09:00
diff --git a/tests/extension/thread_/global_value/Makefile b/tests/extension/thread_/global_value/Makefile
@@ -0,0 +1,29 @@
+TARGET=$(shell ls *.py | grep -v test | grep -v parsetab.py)
+ARGS=
+
+PYTHON=python3
+#PYTHON=python
+#OPT=-m pdb
+#OPT=-m cProfile -s time
+#OPT=-m cProfile -o profile.rslt
+
+.PHONY: all
+all: test
+
+.PHONY: run
+run:
+	$(PYTHON) $(OPT) $(TARGET) $(ARGS)
+
+.PHONY: test
+test:
+	$(PYTHON) -m pytest -vv
+
+.PHONY: check
+check:
+	$(PYTHON) $(OPT) $(TARGET) $(ARGS) > tmp.v
+	iverilog -tnull -Wall tmp.v
+	rm -f tmp.v
+
+.PHONY: clean
+clean:
+	rm -rf *.pyc __pycache__ parsetab.py .cache *.out *.png *.dot tmp.v uut.vcd
diff --git a/tests/extension/thread_/global_value/test_thread_global_value.py b/tests/extension/thread_/global_value/test_thread_global_value.py
@@ -0,0 +1,140 @@
+from __future__ import absolute_import
+from __future__ import print_function
+import veriloggen
+import thread_global_value
+
+expected_verilog = """
+module test;
+
+  reg CLK;
+  reg RST;
+  wire [8-1:0] LED;
+
+  blinkled
+  uut
+  (
+    .CLK(CLK),
+    .RST(RST),
+    .LED(LED)
+  );
+
+
+  initial begin
+    $dumpfile("uut.vcd");
+    $dumpvars(0, uut);
+  end
+
+
+  initial begin
+    CLK = 0;
+    forever begin
+      #5 CLK = !CLK;
+    end
+  end
+
+
+  initial begin
+    RST = 0;
+    #100;
+    RST = 1;
+    #100;
+    RST = 0;
+    #10000;
+    $finish;
+  end
+
+
+endmodule
+
+
+
+module blinkled
+(
+  input CLK,
+  input RST,
+  output reg [8-1:0] LED
+);
+
+  reg [8-1:0] count;
+  reg [32-1:0] th_blink;
+  localparam th_blink_init = 0;
+  reg signed [32-1:0] _th_blink_times_0;
+  reg signed [32-1:0] _th_blink_i_1;
+
+  always @(posedge CLK) begin
+    if(RST) begin
+      count <= 0;
+    end else begin
+      count <= count + 1;
+    end
+  end
+
+  localparam th_blink_1 = 1;
+  localparam th_blink_2 = 2;
+  localparam th_blink_3 = 3;
+  localparam th_blink_4 = 4;
+  localparam th_blink_5 = 5;
+  localparam th_blink_6 = 6;
+  localparam th_blink_7 = 7;
+
+  always @(posedge CLK) begin
+    if(RST) begin
+      th_blink <= th_blink_init;
+      _th_blink_times_0 <= 0;
+      LED <= 0;
+      _th_blink_i_1 <= 0;
+    end else begin
+      case(th_blink)
+        th_blink_init: begin
+          _th_blink_times_0 <= 10;
+          th_blink <= th_blink_1;
+        end
+        th_blink_1: begin
+          LED <= 0;
+          th_blink <= th_blink_2;
+        end
+        th_blink_2: begin
+          _th_blink_i_1 <= 0;
+          th_blink <= th_blink_3;
+        end
+        th_blink_3: begin
+          if(_th_blink_i_1 < _th_blink_times_0) begin
+            th_blink <= th_blink_4;
+          end else begin
+            th_blink <= th_blink_7;
+          end
+        end
+        th_blink_4: begin
+          LED <= count + 100;
+          th_blink <= th_blink_5;
+        end
+        th_blink_5: begin
+          $display("led =  %d", LED);
+          th_blink <= th_blink_6;
+        end
+        th_blink_6: begin
+          _th_blink_i_1 <= _th_blink_i_1 + 1;
+          th_blink <= th_blink_3;
+        end
+      endcase
+    end
+  end
+
+
+endmodule
+"""
+
+
+def test():
+    veriloggen.reset()
+    test_module = thread_global_value.mkTest()
+    code = test_module.to_verilog()
+
+    from pyverilog.vparser.parser import VerilogParser
+    from pyverilog.ast_code_generator.codegen import ASTCodeGenerator
+    parser = VerilogParser()
+    expected_ast = parser.parse(expected_verilog)
+    codegen = ASTCodeGenerator()
+    expected_code = codegen.visit(expected_ast)
+
+    assert(expected_code == code)
diff --git a/tests/extension/thread_/global_value/thread_global_value.py b/tests/extension/thread_/global_value/thread_global_value.py
@@ -0,0 +1,75 @@
+from __future__ import absolute_import
+from __future__ import print_function
+import sys
+import os
+
+# the next line can be removed after installation
+sys.path.insert(0, os.path.dirname(os.path.dirname(os.path.dirname(
+    os.path.dirname(os.path.dirname(os.path.abspath(__file__)))))))
+
+from veriloggen import *
+import veriloggen.thread as vthread
+
+global_value = 100
+
+def mkLed():
+    m = Module('blinkled')
+    clk = m.Input('CLK')
+    rst = m.Input('RST')
+    led = m.OutputReg('LED', 8, initval=0)
+
+    count = m.Reg('count', 8, initval=0)
+
+    seq = Seq(m, 'seq', clk, rst)
+    seq(
+        count.inc()
+    )
+
+    def blink(times):
+        led.value = 0
+        for i in range(times):
+            led.value = count + global_value
+            print("led = ", led)
+
+    th = vthread.Thread(m, 'th_blink', clk, rst, blink)
+    fsm = th.start(10)
+
+    return m
+
+
+def mkTest():
+    m = Module('test')
+
+    # target instance
+    led = mkLed()
+
+    # copy paras and ports
+    params = m.copy_params(led)
+    ports = m.copy_sim_ports(led)
+
+    clk = ports['CLK']
+    rst = ports['RST']
+
+    uut = m.Instance(led, 'uut',
+                     params=m.connect_params(led),
+                     ports=m.connect_ports(led))
+
+    simulation.setup_waveform(m, uut)
+    simulation.setup_clock(m, clk, hperiod=5)
+    init = simulation.setup_reset(m, rst, m.make_reset(), period=100)
+
+    init.add(
+        Delay(10000),
+        Systask('finish'),
+    )
+
+    return m
+
+if __name__ == '__main__':
+    test = mkTest()
+    verilog = test.to_verilog('tmp.v')
+    print(verilog)
+
+    sim = simulation.Simulator(test)
+    rslt = sim.run()
+    print(rslt)
diff --git a/veriloggen/thread/compiler.py b/veriloggen/thread/compiler.py
@@ -52,7 +52,8 @@ class CompileVisitor(ast.NodeVisitor):
 
     def __init__(self, m, name, clk, rst, fsm,
                  functions, intrinsic_functions,
-                 intrinsic_methods, local_objects,
+                 intrinsic_methods,
+                 start_frame,
                  datawidth=32):
 
         self.m = m
@@ -64,7 +65,8 @@ def __init__(self, m, name, clk, rst, fsm,
         self.functions = functions
         self.intrinsic_functions = intrinsic_functions
         self.intrinsic_methods = intrinsic_methods
-        self.local_objects = local_objects
+
+        self.start_frame = start_frame
         self.datawidth = datawidth
 
         fixed_intrinsics = {
@@ -116,7 +118,7 @@ def _variable_type(self, right):
                    'point': right.point,
                    'signed': right.signed}
             return ret
-        if isinstance(right, vtypes._Numeric):
+        if isinstance(right, numerical_types):
             return None
         raise TypeError('unsupported type')
 
@@ -633,10 +635,10 @@ def _call_Attribute(self, node):
             from .thread import Thread
             from .pool import ThreadPool
             if isinstance(value, Thread):
-                value.local_objects = self.local_objects
+                value.start_frame = self.start_frame
             if isinstance(value, ThreadPool):
                 for thread in value.threads:
-                    thread.local_objects = self.local_objects
+                    thread.start_frame = self.start_frame
 
             return method(*args, **kwargs)
 
@@ -988,8 +990,9 @@ def getVariable(self, name, store=False, _type=None):
         var = self.scope.searchVariable(name, store)
         if var is None:
             if not store:
-                if name in self.local_objects:
-                    return self.local_objects[name]
+                local_objects = self.start_frame.f_locals
+                if name in local_objects:
+                    return local_objects[name]
                 glb = self.getGlobalObject(name)
                 if glb is not None:
                     return glb
@@ -1005,8 +1008,7 @@ def getTmpVariable(self, _type=None):
         return var
 
     def getGlobalObject(self, name):
-        frame = inspect.currentframe()
-        global_objects = OrderedDict()
+        global_objects = self.start_frame.f_globals
         if name in global_objects:
             return global_objects[name]
         return None
@@ -1023,8 +1025,9 @@ def getFunction(self, name):
             return func
 
         # implicit function definitions
-        if name in self.local_objects:
-            func = self.local_objects[name]
+        local_objects = self.start_frame.f_locals
+        if name in local_objects:
+            func = local_objects[name]
             if inspect.isfunction(func):
                 text = textwrap.dedent(inspect.getsource(func))
                 tree = ast.parse(text).body[0]
diff --git a/veriloggen/thread/thread.py b/veriloggen/thread/thread.py
@@ -39,7 +39,7 @@ def __init__(self, m, name, clk, rst, targ, datawidth=32, tid=None):
         self.start_state = None
         self.end_state = None
         self.return_value = None
-        self.local_objects = OrderedDict()
+        self.start_frame = None
         self.args_dict = OrderedDict()
         self.vararg_regs = []
         self.vararg_set = False
@@ -55,11 +55,7 @@ def start(self, *args, **kwargs):
             raise ValueError('already started')
 
         frame = inspect.currentframe()
-        _locals = frame.f_back.f_locals
-
-        self.local_objects = OrderedDict()
-        for key, value in _locals.items():
-            self.local_objects[key] = value
+        self.start_frame = frame.f_back
 
         self.fsm = FSM(self.m, self.name, self.clk, self.rst)
 
@@ -73,11 +69,7 @@ def extend(self, fsm, *args, **kwargs):
         """ extend a given thread FSM """
 
         frame = inspect.currentframe()
-        _locals = frame.f_back.f_locals
-
-        self.local_objects = OrderedDict()
-        for key, value in _locals.items():
-            self.local_objects[key] = value
+        self.start_frame = frame.f_back
 
         self._synthesize_start_fsm(args, kwargs, fsm)
 
@@ -201,13 +193,10 @@ def _synthesize_start_fsm(self, args, kwargs, fsm=None):
 
         functions = self._get_functions()
 
-        local_objects = {}
-        for key, value in self.local_objects.items():
-            local_objects[key] = value
-
         cvisitor = compiler.CompileVisitor(self.m, self.name, self.clk, self.rst, fsm,
                                            functions, self.intrinsic_functions,
-                                           self.intrinsic_methods, local_objects,
+                                           self.intrinsic_methods,
+                                           self.start_frame,
                                            datawidth=self.datawidth)
 
         text = textwrap.dedent(inspect.getsource(self.targ))
@@ -268,13 +257,10 @@ def _synthesize_run_fsm(self, parent_fsm, args, kwargs, cond=None):
 
         functions = self._get_functions()
 
-        local_objects = {}
-        for key, value in self.local_objects.items():
-            local_objects[key] = value
-
         cvisitor = compiler.CompileVisitor(self.m, self.name, self.clk, self.rst, self.fsm,
                                            functions, self.intrinsic_functions,
-                                           self.intrinsic_methods, local_objects,
+                                           self.intrinsic_methods,
+                                           self.start_frame,
                                            datawidth=self.datawidth)
 
         text = textwrap.dedent(inspect.getsource(self.targ))
