Copyright year is modified.

shtaxxx · shtaxxx · commit fe59cfd143e4 · 2014-07-20T02:59:21.000+09:00
diff --git a/README.md b/README.md
@@ -2,7 +2,7 @@ Pyverilog
 ==============================
 Python-based Hardware Design Processing Toolkit for Verilog HDL
 
-Copyright (C) 2014, Shinya Takamaeda-Yamazaki
+Copyright (C) 2013, Shinya Takamaeda-Yamazaki
 
 E-mail: shinya\_at\_is.naist.jp
 
diff --git a/pages.md b/pages.md
@@ -329,7 +329,7 @@ The license of PLY is BSD.
 Copyright and Contact
 ==============================
 
-Copyright (C) 2014, Shinya Takamaeda-Yamazaki
+Copyright (C) 2013, Shinya Takamaeda-Yamazaki
 
 E-mail: shinya\_at\_is.naist.jp
 
