Updated setup.py

Author: shtaxxx

setup.py

@@ -9,7 +9,10 @@
 setup(name='pyverilog',
       version=version,
       description='Python-based Hardware Design Processing Toolkit for Verilog HDL',
+      long_description=read('README.md'),
+      keywords = 'Verilog HDL, Lexer, Parser, Dataflow Analyzer, Control-flow Analyzer, Code Generator, Visualizer',
       author='Shinya Takamaeda-Yamazaki',
+      license="Apache License 2.0",
       url='http://shtaxxx.github.io/Pyverilog/',
       packages=find_packages(),
       package_data={ 'pyverilog.ast_code_generator' : ['template/*'],