Skip to content

Commit d0dcfeb

Browse files
committed
AST code generator is modified for empty parameter list.
1 parent e985b58 commit d0dcfeb

File tree

1 file changed

+4
-3
lines changed

1 file changed

+4
-3
lines changed

pyverilog/ast_code_generator/codegen.py

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -66,11 +66,12 @@ def visit_Description(self, node):
6666
def visit_ModuleDef(self, node):
6767
filename = getfilename(node)
6868
template = self.env.get_template(filename)
69-
paramlist = self.visit(node.paramlist)
69+
paramlist = self.visit(node.paramlist) if node.paramlist is not None else ''
70+
portlist = self.visit(node.portlist) if node.portlist is not None else ''
7071
template_dict = {
7172
'modulename' : escape(node.name),
72-
'paramlist' : '' if len(node.paramlist.params) == 0 else paramlist,
73-
'portlist' : self.visit(node.portlist),
73+
'paramlist' : paramlist,
74+
'portlist' : portlist,
7475
'items' : [ self.visit(item) for item in node.items ],
7576
}
7677
rslt = template.render(template_dict)

0 commit comments

Comments
 (0)