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Merge pull request #45 from THofstee/patch-1
Add comma separated edgesigs
2 parents b852cc5 + f00ba41 commit 614d701

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pyverilog/vparser/parser.py

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@@ -1307,6 +1307,11 @@ def p_edgesigs(self, p):
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'edgesigs : edgesigs SENS_OR edgesig'
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p[0] = p[1] + (p[3],)
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p.set_lineno(0, p.lineno(1))
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def p_edgesigs_comma(self, p):
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'edgesigs : edgesigs COMMA edgesig'
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p[0] = p[1] + (p[3],)
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p.set_lineno(0, p.lineno(1))
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def p_edgesigs_one(self, p):
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'edgesigs : edgesig'

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