upload figure

Author: clin99

README.md

@@ -7,6 +7,8 @@ A Fast C++ Header-only Parser for Verilog.
 A [Verilog] is a programming language that is used to describe a 
 digital circuit. Below is a circuit written in Verilog.
 
+<img src="image/circuit.png" width="32%" align="right"> 
+
 ```Verilog 
 module simple (
   input1,

image/.~lock.circuit.odg#

@@ -0,0 +1 @@
+,clin99,csl-408-12.csl.illinois.edu,04.01.2019 16:40,file:///home/clin99/.config/libreoffice/4;