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README.md

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Solvers generated by the tools are C++03 complaint and do not have any dependencies.
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High Level Synthesis (HLS) of C++ solvers for FPGA execution is supported using Xilinx Vivado HLx suite for Xilinx FPGA devices.
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High Level Synthesis (HLS) of C++ solvers for FPGA execution is supported using Xilinx Vivado HLx suite for Xilinx FPGA devices. Solver FPGA cores created with HLS can be utilized on National Instruments FPGA-based platforms.
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## License
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