@@ -401,6 +401,7 @@ void get_cpuconfig(void)
401401 break ;
402402
403403 case CPU_NEOVERSEV1 :
404+ printf ("#define HAVE_SVE 1\n" );
404405 case CPU_CORTEXA76 :
405406 printf ("#define %s\n" , cpuname [d ]);
406407 printf ("#define L1_CODE_SIZE 65536\n" );
@@ -432,6 +433,7 @@ void get_cpuconfig(void)
432433 break ;
433434 case CPU_NEOVERSEV2 :
434435 printf ("#define ARMV9\n" );
436+ printf ("#define HAVE_SVE 1\n" );
435437 printf ("#define %s\n" , cpuname [d ]);
436438 printf ("#define L1_CODE_SIZE 65536\n" );
437439 printf ("#define L1_CODE_LINESIZE 64\n" );
@@ -452,6 +454,7 @@ void get_cpuconfig(void)
452454 case CPU_CORTEXX1 :
453455 case CPU_CORTEXX2 :
454456 printf ("#define ARMV9\n" );
457+ printf ("#define HAVE_SVE 1\n" );
455458 printf ("#define %s\n" , cpuname [d ]);
456459 printf ("#define L1_CODE_SIZE 65536\n" );
457460 printf ("#define L1_CODE_LINESIZE 64\n" );
@@ -568,6 +571,7 @@ void get_cpuconfig(void)
568571 break ;
569572 case CPU_A64FX :
570573 printf ("#define A64FX\n" );
574+ printf ("#define HAVE_SVE 1\n" );
571575 printf ("#define L1_CODE_SIZE 65535\n" );
572576 printf ("#define L1_DATA_SIZE 65535\n" );
573577 printf ("#define L1_DATA_LINESIZE 256\n" );
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