added check for memory out of bounds

Author: wig-nesh

README.md

@@ -12,10 +12,11 @@ chmod +x test_sequential.sh
 ./test_sequential.sh <filename>.s
 ```
 
-PS: I recommend testing 2.s ( a really long programme that checks all the ALU funciton) and 5.s ( has all the instructions.)
+PS: I recommend testing 2.s ( a really long programme that checks all the ALU funciton) and 5.s ( has all the instructions). 6.s checks for invalid data memory address.
 ```bash
 ./test_sequential.sh 5.s
 ./test_sequential.sh 2.s
+./test_sequential.sh 6.s
 ```
 
 ## Assembly Instructions Supported
@@ -31,7 +32,7 @@ The assembler supports a subset of RISC-V instructions:
 - `ld` and `sd` are used to load and store double words. But, they use the same instructions as `lw` and `sw` that are not implemented in this version.
 - Since data memory only supports 64 bit read and write, remember to only use addresses that are multiples of 8.
 
-## Web visulization:
+## Web visualization:
 - if doesn't run by doing the test_sequential.sh otherwise it should just open a web browser
 ```bash
 cd sequential

sequential/modules/data_memory.v

@@ -15,7 +15,10 @@ module data_memory(
     end
 
     always @(posedge clk) begin
-        if (mem_write) begin
+        if (address > 1016) begin
+            $fatal(1, "\n\nError: Invalid memory address %d\n", address);
+        end
+        if (mem_write && address <= 1016) begin
             memory[address]   <= write_data[7:0];
             memory[address+1] <= write_data[15:8];
             memory[address+2] <= write_data[23:16];
@@ -28,7 +31,10 @@ module data_memory(
     end
 
     always @(*) begin
-        if (mem_read) begin
+        if (address > 1016) begin
+            $fatal(1, "\n\nError: Invalid memory address %d\n", address);
+        end
+        if (mem_read && address <= 1016) begin
             read_data = {memory[address+7], memory[address+6], memory[address+5], memory[address+4],
                          memory[address+3], memory[address+2], memory[address+1], memory[address]};
         end else begin

sequential/modules/instruction_memory.v

@@ -1,8 +1,15 @@
 module instruction_memory(
     input [63:0] pc,
-    output [31:0] instruction
+    output reg [31:0] instruction
 );
     reg [31:0] memory [0:1023]; // 1024 max instructions
 
-    assign instruction = memory[pc[11:2]]; // 10 bits to address 1024 instructions
+    always @(*) begin
+        if (pc[11:2] > 1023) begin
+            $fatal(1, "Error: Invalid instruction address %d (out of range)", pc);
+        end else begin
+            instruction = memory[pc[11:2]]; // Access instruction memory (byte-aligned)
+        end
+    end
+
 endmodule

sequential/testcases/6.s

@@ -0,0 +1,11 @@
+begin:
+    addi x6, x0, 10
+
+    addi x7, x0, 0
+    addi x8, x0, 1024
+
+    sd x6 0(x7)
+    sd x6 0(x8)
+
+end:
+    nop