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wesleywiserwesleywiser
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[mir-opt] Prevent mis-optimization when SimplifyArmIdentity runs
If temporaries are used beyond just the temporary chain, then we can't optimize out the reads and writes.
1 parent e3f599c commit 9248d90

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10 files changed

+192
-97
lines changed

10 files changed

+192
-97
lines changed

‎src/librustc_mir/transform/simplify_try.rs‎

Lines changed: 49 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -12,6 +12,7 @@
1212
use crate::transform::{simplify, MirPass, MirSource};
1313
use itertools::Itertools as _;
1414
use rustc_index::vec::IndexVec;
15+
use rustc_middle::mir::visit::{PlaceContext, Visitor};
1516
use rustc_middle::mir::*;
1617
use rustc_middle::ty::{Ty, TyCtxt};
1718
use rustc_target::abi::VariantIdx;
@@ -75,7 +76,9 @@ struct ArmIdentityInfo<'tcx> {
7576
stmts_to_remove: Vec<usize>,
7677
}
7778

78-
fn get_arm_identity_info<'a, 'tcx>(stmts: &'a [Statement<'tcx>]) -> Option<ArmIdentityInfo<'tcx>> {
79+
fn get_arm_identity_info<'a, 'tcx>(
80+
stmts: &'a [Statement<'tcx>],
81+
) -> Option<ArmIdentityInfo<'tcx>> {
7982
// This can't possibly match unless there are at least 3 statements in the block
8083
// so fail fast on tiny blocks.
8184
if stmts.len() < 3 {
@@ -249,6 +252,7 @@ fn get_arm_identity_info<'a, 'tcx>(stmts: &'a [Statement<'tcx>]) -> Option<ArmId
249252
fn optimization_applies<'tcx>(
250253
opt_info: &ArmIdentityInfo<'tcx>,
251254
local_decls: &IndexVec<Local, LocalDecl<'tcx>>,
255+
local_uses: &IndexVec<Local, usize>,
252256
) -> bool {
253257
trace!("testing if optimization applies...");
254258

@@ -285,6 +289,26 @@ fn optimization_applies<'tcx>(
285289
last_assigned_to = *l;
286290
}
287291

292+
// Check that the first and last used locals are only used twice
293+
// since they are of the form:
294+
//
295+
// ```
296+
// _first = ((_x as Variant).n: ty);
297+
// _n = _first;
298+
// ...
299+
// ((_y as Variant).n: ty) = _n;
300+
// discriminant(_y) = z;
301+
// ```
302+
for (l, r) in &opt_info.field_tmp_assignments {
303+
if local_uses[*l] != 2 {
304+
warn!("NO: FAILED assignment chain local {:?} was used more than twice", l);
305+
return false;
306+
} else if local_uses[*r] != 2 {
307+
warn!("NO: FAILED assignment chain local {:?} was used more than twice", r);
308+
return false;
309+
}
310+
}
311+
288312
if source_local != opt_info.local_temp_0 {
289313
trace!(
290314
"NO: start of assignment chain does not match enum variant temp: {:?} != {:?}",
@@ -312,11 +336,12 @@ impl<'tcx> MirPass<'tcx> for SimplifyArmIdentity {
312336
}
313337

314338
trace!("running SimplifyArmIdentity on {:?}", source);
339+
let local_uses = LocalUseCounter::get_local_uses(body);
315340
let (basic_blocks, local_decls) = body.basic_blocks_and_local_decls_mut();
316341
for bb in basic_blocks {
317342
if let Some(opt_info) = get_arm_identity_info(&bb.statements) {
318343
trace!("got opt_info = {:#?}", opt_info);
319-
if !optimization_applies(&opt_info, local_decls) {
344+
if !optimization_applies(&opt_info, local_decls, &local_uses) {
320345
debug!("optimization skipped for {:?}", source);
321346
continue;
322347
}
@@ -358,6 +383,28 @@ impl<'tcx> MirPass<'tcx> for SimplifyArmIdentity {
358383
}
359384
}
360385

386+
struct LocalUseCounter {
387+
local_uses: IndexVec<Local, usize>,
388+
}
389+
390+
impl LocalUseCounter {
391+
fn get_local_uses<'tcx>(body: &Body<'tcx>) -> IndexVec<Local, usize> {
392+
let mut counter = LocalUseCounter { local_uses: IndexVec::from_elem(0, &body.local_decls) };
393+
counter.visit_body(body);
394+
counter.local_uses
395+
}
396+
}
397+
398+
impl<'tcx> Visitor<'tcx> for LocalUseCounter {
399+
fn visit_local(&mut self, local: &Local, context: PlaceContext, _location: Location) {
400+
if context.is_storage_marker() {
401+
return;
402+
}
403+
404+
self.local_uses[*local] += 1;
405+
}
406+
}
407+
361408
/// Match on:
362409
/// ```rust
363410
/// _LOCAL_INTO = ((_LOCAL_FROM as Variant).FIELD: TY);

‎src/test/mir-opt/issue-73223/32bit/rustc.main.PreCodegen.diff‎

Lines changed: 20 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -3,9 +3,9 @@
33

44
fn main() -> () {
55
let mut _0: (); // return place in scope 0 at $DIR/issue-73223.rs:1:11: 1:11
6-
let _1: i32; // in scope 0 at $DIR/issue-73223.rs:2:9: 2:14
7-
let mut _2: std::option::Option<i32>; // in scope 0 at $DIR/issue-73223.rs:2:23: 2:30
8-
let _3: i32; // in scope 0 at $DIR/issue-73223.rs:3:14: 3:15
6+
let mut _1: std::option::Option<i32>; // in scope 0 at $DIR/issue-73223.rs:2:23: 2:30
7+
let _2: i32; // in scope 0 at $DIR/issue-73223.rs:3:14: 3:15
8+
let mut _4: i32; // in scope 0 at $DIR/issue-73223.rs:7:22: 7:27
99
let mut _5: (&i32, &i32); // in scope 0 at $SRC_DIR/libcore/macros/mod.rs:LL:COL
1010
let mut _6: &i32; // in scope 0 at $SRC_DIR/libcore/macros/mod.rs:LL:COL
1111
let mut _9: bool; // in scope 0 at $SRC_DIR/libcore/macros/mod.rs:LL:COL
@@ -28,10 +28,10 @@
2828
let mut _28: std::fmt::ArgumentV1; // in scope 0 at $SRC_DIR/libstd/macros.rs:LL:COL
2929
let mut _29: for<'r, 's, 't0> fn(&'r &i32, &'s mut std::fmt::Formatter<'t0>) -> std::result::Result<(), std::fmt::Error>; // in scope 0 at $SRC_DIR/libcore/macros/mod.rs:LL:COL
3030
scope 1 {
31-
debug split => _1; // in scope 1 at $DIR/issue-73223.rs:2:9: 2:14
32-
let _4: std::option::Option<i32>; // in scope 1 at $DIR/issue-73223.rs:7:9: 7:14
31+
debug split => _2; // in scope 1 at $DIR/issue-73223.rs:2:9: 2:14
32+
let _3: std::option::Option<i32>; // in scope 1 at $DIR/issue-73223.rs:7:9: 7:14
3333
scope 3 {
34-
debug _prev => _4; // in scope 3 at $DIR/issue-73223.rs:7:9: 7:14
34+
debug _prev => _3; // in scope 3 at $DIR/issue-73223.rs:7:9: 7:14
3535
let _7: &i32; // in scope 3 at $SRC_DIR/libcore/macros/mod.rs:LL:COL
3636
let _8: &i32; // in scope 3 at $SRC_DIR/libcore/macros/mod.rs:LL:COL
3737
scope 4 {
@@ -64,30 +64,34 @@
6464
}
6565
}
6666
scope 2 {
67-
debug v => _3; // in scope 2 at $DIR/issue-73223.rs:3:14: 3:15
67+
debug v => _2; // in scope 2 at $DIR/issue-73223.rs:3:14: 3:15
6868
}
6969
scope 7 {
7070
}
7171
scope 9 {
7272
}
7373

7474
bb0: {
75-
StorageLive(_1); // scope 0 at $DIR/issue-73223.rs:2:9: 2:14
76-
StorageLive(_2); // scope 0 at $DIR/issue-73223.rs:2:23: 2:30
77-
((_2 as Some).0: i32) = const 1_i32; // scope 0 at $DIR/issue-73223.rs:2:23: 2:30
75+
StorageLive(_1); // scope 0 at $DIR/issue-73223.rs:2:23: 2:30
76+
((_1 as Some).0: i32) = const 1_i32; // scope 0 at $DIR/issue-73223.rs:2:23: 2:30
7877
// ty::Const
7978
// + ty: i32
8079
// + val: Value(Scalar(0x00000001))
8180
// mir::Constant
8281
// + span: $DIR/issue-73223.rs:2:28: 2:29
8382
// + literal: Const { ty: i32, val: Value(Scalar(0x00000001)) }
84-
discriminant(_2) = 1; // scope 0 at $DIR/issue-73223.rs:2:23: 2:30
85-
_4 = move _2; // scope 1 at $DIR/issue-73223.rs:7:17: 7:28
86-
StorageDead(_2); // scope 0 at $DIR/issue-73223.rs:5:6: 5:7
87-
StorageLive(_4); // scope 1 at $DIR/issue-73223.rs:7:9: 7:14
83+
discriminant(_1) = 1; // scope 0 at $DIR/issue-73223.rs:2:23: 2:30
84+
_2 = ((_1 as Some).0: i32); // scope 0 at $DIR/issue-73223.rs:3:14: 3:15
85+
StorageDead(_1); // scope 0 at $DIR/issue-73223.rs:5:6: 5:7
86+
StorageLive(_3); // scope 1 at $DIR/issue-73223.rs:7:9: 7:14
87+
StorageLive(_4); // scope 1 at $DIR/issue-73223.rs:7:22: 7:27
88+
_4 = _2; // scope 1 at $DIR/issue-73223.rs:7:22: 7:27
89+
((_3 as Some).0: i32) = move _4; // scope 1 at $DIR/issue-73223.rs:7:17: 7:28
90+
discriminant(_3) = 1; // scope 1 at $DIR/issue-73223.rs:7:17: 7:28
91+
StorageDead(_4); // scope 1 at $DIR/issue-73223.rs:7:27: 7:28
8892
StorageLive(_5); // scope 3 at $SRC_DIR/libcore/macros/mod.rs:LL:COL
8993
StorageLive(_6); // scope 3 at $SRC_DIR/libcore/macros/mod.rs:LL:COL
90-
_6 = &_1; // scope 3 at $SRC_DIR/libcore/macros/mod.rs:LL:COL
94+
_6 = &_2; // scope 3 at $SRC_DIR/libcore/macros/mod.rs:LL:COL
9195
(_5.0: &i32) = move _6; // scope 3 at $SRC_DIR/libcore/macros/mod.rs:LL:COL
9296
(_5.1: &i32) = const main::promoted[1]; // scope 3 at $SRC_DIR/libcore/macros/mod.rs:LL:COL
9397
// ty::Const
@@ -127,8 +131,7 @@
127131
// mir::Constant
128132
// + span: $DIR/issue-73223.rs:1:11: 9:2
129133
// + literal: Const { ty: (), val: Value(Scalar(<ZST>)) }
130-
StorageDead(_4); // scope 1 at $DIR/issue-73223.rs:9:1: 9:2
131-
StorageDead(_1); // scope 0 at $DIR/issue-73223.rs:9:1: 9:2
134+
StorageDead(_3); // scope 1 at $DIR/issue-73223.rs:9:1: 9:2
132135
return; // scope 0 at $DIR/issue-73223.rs:9:2: 9:2
133136
}
134137

‎src/test/mir-opt/issue-73223/32bit/rustc.main.SimplifyArmIdentity.diff‎

Lines changed: 9 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -134,18 +134,17 @@
134134
}
135135

136136
bb2: {
137-
- StorageLive(_4); // scope 0 at $DIR/issue-73223.rs:3:14: 3:15
138-
- _4 = ((_2 as Some).0: i32); // scope 0 at $DIR/issue-73223.rs:3:14: 3:15
139-
- _1 = _4; // scope 2 at $DIR/issue-73223.rs:3:20: 3:21
140-
- StorageDead(_4); // scope 0 at $DIR/issue-73223.rs:3:21: 3:22
141-
+ _6 = move _2; // scope 1 at $DIR/issue-73223.rs:7:17: 7:28
137+
StorageLive(_4); // scope 0 at $DIR/issue-73223.rs:3:14: 3:15
138+
_4 = ((_2 as Some).0: i32); // scope 0 at $DIR/issue-73223.rs:3:14: 3:15
139+
_1 = _4; // scope 2 at $DIR/issue-73223.rs:3:20: 3:21
140+
StorageDead(_4); // scope 0 at $DIR/issue-73223.rs:3:21: 3:22
142141
StorageDead(_2); // scope 0 at $DIR/issue-73223.rs:5:6: 5:7
143142
StorageLive(_6); // scope 1 at $DIR/issue-73223.rs:7:9: 7:14
144-
- StorageLive(_7); // scope 1 at $DIR/issue-73223.rs:7:22: 7:27
145-
- _7 = _1; // scope 1 at $DIR/issue-73223.rs:7:22: 7:27
146-
- ((_6 as Some).0: i32) = move _7; // scope 1 at $DIR/issue-73223.rs:7:17: 7:28
147-
- discriminant(_6) = 1; // scope 1 at $DIR/issue-73223.rs:7:17: 7:28
148-
- StorageDead(_7); // scope 1 at $DIR/issue-73223.rs:7:27: 7:28
143+
StorageLive(_7); // scope 1 at $DIR/issue-73223.rs:7:22: 7:27
144+
_7 = _1; // scope 1 at $DIR/issue-73223.rs:7:22: 7:27
145+
((_6 as Some).0: i32) = move _7; // scope 1 at $DIR/issue-73223.rs:7:17: 7:28
146+
discriminant(_6) = 1; // scope 1 at $DIR/issue-73223.rs:7:17: 7:28
147+
StorageDead(_7); // scope 1 at $DIR/issue-73223.rs:7:27: 7:28
149148
StorageLive(_8); // scope 3 at $SRC_DIR/libcore/macros/mod.rs:LL:COL
150149
StorageLive(_9); // scope 3 at $SRC_DIR/libcore/macros/mod.rs:LL:COL
151150
StorageLive(_10); // scope 3 at $SRC_DIR/libcore/macros/mod.rs:LL:COL

‎src/test/mir-opt/issue-73223/64bit/rustc.main.PreCodegen.diff‎

Lines changed: 20 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -3,9 +3,9 @@
33

44
fn main() -> () {
55
let mut _0: (); // return place in scope 0 at $DIR/issue-73223.rs:1:11: 1:11
6-
let _1: i32; // in scope 0 at $DIR/issue-73223.rs:2:9: 2:14
7-
let mut _2: std::option::Option<i32>; // in scope 0 at $DIR/issue-73223.rs:2:23: 2:30
8-
let _3: i32; // in scope 0 at $DIR/issue-73223.rs:3:14: 3:15
6+
let mut _1: std::option::Option<i32>; // in scope 0 at $DIR/issue-73223.rs:2:23: 2:30
7+
let _2: i32; // in scope 0 at $DIR/issue-73223.rs:3:14: 3:15
8+
let mut _4: i32; // in scope 0 at $DIR/issue-73223.rs:7:22: 7:27
99
let mut _5: (&i32, &i32); // in scope 0 at $SRC_DIR/libcore/macros/mod.rs:LL:COL
1010
let mut _6: &i32; // in scope 0 at $SRC_DIR/libcore/macros/mod.rs:LL:COL
1111
let mut _9: bool; // in scope 0 at $SRC_DIR/libcore/macros/mod.rs:LL:COL
@@ -28,10 +28,10 @@
2828
let mut _28: std::fmt::ArgumentV1; // in scope 0 at $SRC_DIR/libstd/macros.rs:LL:COL
2929
let mut _29: for<'r, 's, 't0> fn(&'r &i32, &'s mut std::fmt::Formatter<'t0>) -> std::result::Result<(), std::fmt::Error>; // in scope 0 at $SRC_DIR/libcore/macros/mod.rs:LL:COL
3030
scope 1 {
31-
debug split => _1; // in scope 1 at $DIR/issue-73223.rs:2:9: 2:14
32-
let _4: std::option::Option<i32>; // in scope 1 at $DIR/issue-73223.rs:7:9: 7:14
31+
debug split => _2; // in scope 1 at $DIR/issue-73223.rs:2:9: 2:14
32+
let _3: std::option::Option<i32>; // in scope 1 at $DIR/issue-73223.rs:7:9: 7:14
3333
scope 3 {
34-
debug _prev => _4; // in scope 3 at $DIR/issue-73223.rs:7:9: 7:14
34+
debug _prev => _3; // in scope 3 at $DIR/issue-73223.rs:7:9: 7:14
3535
let _7: &i32; // in scope 3 at $SRC_DIR/libcore/macros/mod.rs:LL:COL
3636
let _8: &i32; // in scope 3 at $SRC_DIR/libcore/macros/mod.rs:LL:COL
3737
scope 4 {
@@ -64,30 +64,34 @@
6464
}
6565
}
6666
scope 2 {
67-
debug v => _3; // in scope 2 at $DIR/issue-73223.rs:3:14: 3:15
67+
debug v => _2; // in scope 2 at $DIR/issue-73223.rs:3:14: 3:15
6868
}
6969
scope 7 {
7070
}
7171
scope 9 {
7272
}
7373

7474
bb0: {
75-
StorageLive(_1); // scope 0 at $DIR/issue-73223.rs:2:9: 2:14
76-
StorageLive(_2); // scope 0 at $DIR/issue-73223.rs:2:23: 2:30
77-
((_2 as Some).0: i32) = const 1_i32; // scope 0 at $DIR/issue-73223.rs:2:23: 2:30
75+
StorageLive(_1); // scope 0 at $DIR/issue-73223.rs:2:23: 2:30
76+
((_1 as Some).0: i32) = const 1_i32; // scope 0 at $DIR/issue-73223.rs:2:23: 2:30
7877
// ty::Const
7978
// + ty: i32
8079
// + val: Value(Scalar(0x00000001))
8180
// mir::Constant
8281
// + span: $DIR/issue-73223.rs:2:28: 2:29
8382
// + literal: Const { ty: i32, val: Value(Scalar(0x00000001)) }
84-
discriminant(_2) = 1; // scope 0 at $DIR/issue-73223.rs:2:23: 2:30
85-
_4 = move _2; // scope 1 at $DIR/issue-73223.rs:7:17: 7:28
86-
StorageDead(_2); // scope 0 at $DIR/issue-73223.rs:5:6: 5:7
87-
StorageLive(_4); // scope 1 at $DIR/issue-73223.rs:7:9: 7:14
83+
discriminant(_1) = 1; // scope 0 at $DIR/issue-73223.rs:2:23: 2:30
84+
_2 = ((_1 as Some).0: i32); // scope 0 at $DIR/issue-73223.rs:3:14: 3:15
85+
StorageDead(_1); // scope 0 at $DIR/issue-73223.rs:5:6: 5:7
86+
StorageLive(_3); // scope 1 at $DIR/issue-73223.rs:7:9: 7:14
87+
StorageLive(_4); // scope 1 at $DIR/issue-73223.rs:7:22: 7:27
88+
_4 = _2; // scope 1 at $DIR/issue-73223.rs:7:22: 7:27
89+
((_3 as Some).0: i32) = move _4; // scope 1 at $DIR/issue-73223.rs:7:17: 7:28
90+
discriminant(_3) = 1; // scope 1 at $DIR/issue-73223.rs:7:17: 7:28
91+
StorageDead(_4); // scope 1 at $DIR/issue-73223.rs:7:27: 7:28
8892
StorageLive(_5); // scope 3 at $SRC_DIR/libcore/macros/mod.rs:LL:COL
8993
StorageLive(_6); // scope 3 at $SRC_DIR/libcore/macros/mod.rs:LL:COL
90-
_6 = &_1; // scope 3 at $SRC_DIR/libcore/macros/mod.rs:LL:COL
94+
_6 = &_2; // scope 3 at $SRC_DIR/libcore/macros/mod.rs:LL:COL
9195
(_5.0: &i32) = move _6; // scope 3 at $SRC_DIR/libcore/macros/mod.rs:LL:COL
9296
(_5.1: &i32) = const main::promoted[1]; // scope 3 at $SRC_DIR/libcore/macros/mod.rs:LL:COL
9397
// ty::Const
@@ -127,8 +131,7 @@
127131
// mir::Constant
128132
// + span: $DIR/issue-73223.rs:1:11: 9:2
129133
// + literal: Const { ty: (), val: Value(Scalar(<ZST>)) }
130-
StorageDead(_4); // scope 1 at $DIR/issue-73223.rs:9:1: 9:2
131-
StorageDead(_1); // scope 0 at $DIR/issue-73223.rs:9:1: 9:2
134+
StorageDead(_3); // scope 1 at $DIR/issue-73223.rs:9:1: 9:2
132135
return; // scope 0 at $DIR/issue-73223.rs:9:2: 9:2
133136
}
134137

‎src/test/mir-opt/issue-73223/64bit/rustc.main.SimplifyArmIdentity.diff‎

Lines changed: 9 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -134,18 +134,17 @@
134134
}
135135

136136
bb2: {
137-
- StorageLive(_4); // scope 0 at $DIR/issue-73223.rs:3:14: 3:15
138-
- _4 = ((_2 as Some).0: i32); // scope 0 at $DIR/issue-73223.rs:3:14: 3:15
139-
- _1 = _4; // scope 2 at $DIR/issue-73223.rs:3:20: 3:21
140-
- StorageDead(_4); // scope 0 at $DIR/issue-73223.rs:3:21: 3:22
141-
+ _6 = move _2; // scope 1 at $DIR/issue-73223.rs:7:17: 7:28
137+
StorageLive(_4); // scope 0 at $DIR/issue-73223.rs:3:14: 3:15
138+
_4 = ((_2 as Some).0: i32); // scope 0 at $DIR/issue-73223.rs:3:14: 3:15
139+
_1 = _4; // scope 2 at $DIR/issue-73223.rs:3:20: 3:21
140+
StorageDead(_4); // scope 0 at $DIR/issue-73223.rs:3:21: 3:22
142141
StorageDead(_2); // scope 0 at $DIR/issue-73223.rs:5:6: 5:7
143142
StorageLive(_6); // scope 1 at $DIR/issue-73223.rs:7:9: 7:14
144-
- StorageLive(_7); // scope 1 at $DIR/issue-73223.rs:7:22: 7:27
145-
- _7 = _1; // scope 1 at $DIR/issue-73223.rs:7:22: 7:27
146-
- ((_6 as Some).0: i32) = move _7; // scope 1 at $DIR/issue-73223.rs:7:17: 7:28
147-
- discriminant(_6) = 1; // scope 1 at $DIR/issue-73223.rs:7:17: 7:28
148-
- StorageDead(_7); // scope 1 at $DIR/issue-73223.rs:7:27: 7:28
143+
StorageLive(_7); // scope 1 at $DIR/issue-73223.rs:7:22: 7:27
144+
_7 = _1; // scope 1 at $DIR/issue-73223.rs:7:22: 7:27
145+
((_6 as Some).0: i32) = move _7; // scope 1 at $DIR/issue-73223.rs:7:17: 7:28
146+
discriminant(_6) = 1; // scope 1 at $DIR/issue-73223.rs:7:17: 7:28
147+
StorageDead(_7); // scope 1 at $DIR/issue-73223.rs:7:27: 7:28
149148
StorageLive(_8); // scope 3 at $SRC_DIR/libcore/macros/mod.rs:LL:COL
150149
StorageLive(_9); // scope 3 at $SRC_DIR/libcore/macros/mod.rs:LL:COL
151150
StorageLive(_10); // scope 3 at $SRC_DIR/libcore/macros/mod.rs:LL:COL

‎src/test/mir-opt/simplify-locals-removes-unused-discriminant-reads/32bit/rustc.map.SimplifyLocals.diff‎

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,9 @@
1919
}
2020

2121
bb1: {
22-
_0 = move _1; // scope 1 at $DIR/simplify-locals-removes-unused-discriminant-reads.rs:4:20: 4:27
22+
_3 = move ((_1 as Some).0: std::boxed::Box<()>); // scope 0 at $DIR/simplify-locals-removes-unused-discriminant-reads.rs:4:14: 4:15
23+
((_0 as Some).0: std::boxed::Box<()>) = move _3; // scope 1 at $DIR/simplify-locals-removes-unused-discriminant-reads.rs:4:20: 4:27
24+
discriminant(_0) = 1; // scope 1 at $DIR/simplify-locals-removes-unused-discriminant-reads.rs:4:20: 4:27
2325
goto -> bb3; // scope 0 at $DIR/simplify-locals-removes-unused-discriminant-reads.rs:2:5: 5:6
2426
}
2527

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