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4 | 4 | Copyright (C)2000,2001,2004 Dan Potter |
5 | 5 | */ |
6 | 6 |
|
| 7 | +#include <kos/regfield.h> |
7 | 8 | #include <dc/scif.h> |
8 | 9 |
|
9 | 10 | /* |
@@ -32,8 +33,15 @@ kernel or for debugging it. |
32 | 33 | #define SCSPTR2 SCIFREG16(0xffe80020) |
33 | 34 | #define SCLSR2 SCIFREG16(0xffe80024) |
34 | 35 |
|
35 | | -//#define PTR2_RTSIO (1 << 7) |
36 | | -//#define PTR2_RTSDT (1 << 6) |
| 36 | +/* Serial port register bits */ |
| 37 | +#define SPB2DT BIT(0) /* Serial port break data */ |
| 38 | +#define SPB2IO BIT(1) /* Serial port break IO */ |
| 39 | +#define SCKDT BIT(2) /* Clock data */ |
| 40 | +#define SCKIO BIT(3) /* Clock IO */ |
| 41 | +#define CTSDT BIT(4) /* CTS data */ |
| 42 | +#define CTSIO BIT(5) /* CTS IO */ |
| 43 | +#define RTSDT BIT(6) /* RTS data */ |
| 44 | +#define RTSIO BIT(7) /* RTS IO */ |
37 | 45 |
|
38 | 46 | /* Default serial parameters */ |
39 | 47 | //static int serial_baud = 57600; |
@@ -70,21 +78,25 @@ int scif_init() { |
70 | 78 | for (i=0; i<10000; i++) |
71 | 79 | __asm__("nop"); |
72 | 80 |
|
| 81 | +#ifdef DEV_TYPE_SD |
| 82 | + /* Unreset, disable hardware flow control, triggers on 8 bytes */ |
| 83 | + SCFCR2 = 0x40; |
| 84 | + /* RTS can be used as CS for SCI-SPI SD card on NAOMI */ |
| 85 | + SCSPTR2 = (RTSIO | RTSDT); |
| 86 | +#else |
73 | 87 | /* Unreset, enable hardware flow control, triggers on 8 bytes */ |
74 | 88 | SCFCR2 = 0x48; |
75 | | - |
| 89 | + |
76 | 90 | /* Disable manual pin control */ |
77 | 91 | SCSPTR2 = 0; |
78 | | - |
79 | | - /* Disable SD */ |
80 | | -// SCSPTR2 = PTR2_RTSIO | PTR2_RTSDT; |
81 | | - |
| 92 | +#endif |
| 93 | + |
82 | 94 | /* Clear status */ |
83 | 95 | (void)SCFSR2; |
84 | 96 | SCFSR2 = 0x60; |
85 | 97 | (void)SCLSR2; |
86 | 98 | SCLSR2 = 0; |
87 | | - |
| 99 | + |
88 | 100 | /* Enable transmit/receive */ |
89 | 101 | SCSCR2 = 0x30; |
90 | 102 |
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