Skip to content

Commit 8c25c97

Browse files
committed
[fw-isoldr] Improved error handling for SD card and reinit on failures.
Also some improvements and fixes for SCI.
1 parent 4f88d2d commit 8c25c97

File tree

3 files changed

+128
-71
lines changed

3 files changed

+128
-71
lines changed

firmware/isoldr/loader/Makefile.cfg

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -101,8 +101,8 @@ MAIN = startup.os main.o syscalls.o reader.o mmu.o utils.o malloc.o \
101101
LOBJECTS = $(MAIN) $(KOS)
102102
TARGETCFLAGS += -I$(KOS_DIR) -I./include -I./kos -I../../../include
103103

104-
SD_CFLAGS = -DDEV_NAME=\"SD-SPI\" -DDEV_TYPE_SD=1 -D_FS_ASYNC=1 -DNO_SD_INIT=1 \
105-
-I$(FATFS_DIR)/include -I./dev
104+
SD_CFLAGS = -DDEV_NAME=\"SD-SPI\" -DDEV_TYPE_SD=1 -D_FS_ASYNC=1 \
105+
-I$(FATFS_DIR)/include -I./dev #-DNO_SD_INIT=1
106106

107107
IDE_CFLAGS = -DDEV_NAME=\"IDE\" -DDEV_TYPE_IDE=1 -D_FS_ASYNC=1 \
108108
-I$(FATFS_DIR)/include -I./dev

firmware/isoldr/loader/dev/sd/sci.c

Lines changed: 23 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -1067,13 +1067,13 @@ sci_result_t sci_spi_dma_write_data(const uint8_t *data, size_t len, dma_callbac
10671067
sci_result_t result;
10681068
uint32_t timeout_cnt = 0;
10691069

1070-
if(!initialized || sci_mode != SCI_MODE_SPI) {
1071-
return SCI_ERR_NOT_INITIALIZED;
1072-
}
1070+
// if(!initialized || sci_mode != SCI_MODE_SPI) {
1071+
// return SCI_ERR_NOT_INITIALIZED;
1072+
// }
10731073

1074-
if(data == NULL || len == 0 || spi_dma_buffer == NULL || len > spi_buffer_size) {
1075-
return SCI_ERR_PARAM;
1076-
}
1074+
// if(data == NULL || len == 0 || spi_dma_buffer == NULL || len > spi_buffer_size) {
1075+
// return SCI_ERR_PARAM;
1076+
// }
10771077

10781078
/* Reverse each byte */
10791079
for(i = 0; i < len; i++) {
@@ -1088,8 +1088,8 @@ sci_result_t sci_spi_dma_write_data(const uint8_t *data, size_t len, dma_callbac
10881088
dma_addr_t src = dma_map_src(spi_dma_buffer, len);
10891089
dma_addr_t dst = hw_to_dma_addr(SCTDR1_ADDR);
10901090

1091-
/* PVR DMA conflict check */
1092-
do {} while(*(volatile uint32_t *)0xa05f6808);
1091+
irq_disable_scoped();
1092+
do {} while(dma_is_running(config.channel) || dma_is_running(DMA_CHANNEL_0));
10931093

10941094
/* Enable transmission */
10951095
sci_set_transfer_mode(TE);
@@ -1111,7 +1111,8 @@ sci_result_t sci_spi_dma_write_data(const uint8_t *data, size_t len, dma_callbac
11111111
while(!(SCSSR1 & TEND)) {
11121112
if(++timeout_cnt > SCI_MAX_WAIT_CYCLES) {
11131113
sci_set_transfer_mode(0);
1114-
dbglog(DBG_ERROR, "SCI: Timeout waiting for TEND in SPI read data\n");
1114+
dma_transfer_abort(config.channel);
1115+
dbglog(DBG_ERROR, "SCI: Timeout waiting for TEND in SPI DMA write data\n");
11151116
return SCI_ERR_TIMEOUT;
11161117
}
11171118
}
@@ -1128,13 +1129,13 @@ sci_result_t sci_spi_dma_read_data(uint8_t *data, size_t len, dma_callback_t cal
11281129
uint32_t timeout_cnt;
11291130
uint8_t *buffer = spi_dma_buffer;
11301131

1131-
if(!initialized || sci_mode != SCI_MODE_SPI) {
1132-
return SCI_ERR_NOT_INITIALIZED;
1133-
}
1132+
// if(!initialized || sci_mode != SCI_MODE_SPI) {
1133+
// return SCI_ERR_NOT_INITIALIZED;
1134+
// }
11341135

1135-
if(data == NULL || len == 0 || spi_dma_buffer == NULL || len > spi_buffer_size) {
1136-
return SCI_ERR_PARAM;
1137-
}
1136+
// if(data == NULL || len == 0 || spi_dma_buffer == NULL || len > spi_buffer_size) {
1137+
// return SCI_ERR_PARAM;
1138+
// }
11381139

11391140
/* Configure DMA */
11401141
dma_config_t config = sci_dma_rx_config;
@@ -1144,8 +1145,8 @@ sci_result_t sci_spi_dma_read_data(uint8_t *data, size_t len, dma_callback_t cal
11441145
dma_addr_t src = hw_to_dma_addr(SCRDR1_ADDR);
11451146
dma_addr_t dst = dma_map_dst(spi_dma_buffer, len);
11461147

1147-
/* PVR DMA conflict check */
1148-
do {} while(*(volatile uint32_t *)0xa05f6808);
1148+
irq_disable_scoped();
1149+
do {} while(dma_is_running(config.channel) || dma_is_running(DMA_CHANNEL_0));
11491150

11501151
/* Enable full-duplex mode */
11511152
sci_set_transfer_mode(RE | TE);
@@ -1163,7 +1164,8 @@ sci_result_t sci_spi_dma_read_data(uint8_t *data, size_t len, dma_callback_t cal
11631164
while(!(SCSSR1 & TDRE)) {
11641165
if(++timeout_cnt > SCI_MAX_WAIT_CYCLES) {
11651166
sci_set_transfer_mode(0);
1166-
dbglog(DBG_ERROR, "SCI: Timeout waiting for TDRE in SPI read data\n");
1167+
dma_transfer_abort(config.channel);
1168+
dbglog(DBG_ERROR, "SCI: Timeout waiting for TDRE in SPI DMA read data\n");
11671169
return SCI_ERR_TIMEOUT;
11681170
}
11691171
}
@@ -1181,7 +1183,8 @@ sci_result_t sci_spi_dma_read_data(uint8_t *data, size_t len, dma_callback_t cal
11811183
while(!(SCSSR1 & TEND)) {
11821184
if(++timeout_cnt > SCI_MAX_WAIT_CYCLES) {
11831185
sci_set_transfer_mode(0);
1184-
dbglog(DBG_ERROR, "SCI: Timeout waiting for TEND in SPI read data\n");
1186+
dma_transfer_abort(config.channel);
1187+
dbglog(DBG_ERROR, "SCI: Timeout waiting for TEND in SPI DMA read data\n");
11851188
return SCI_ERR_TIMEOUT;
11861189
}
11871190
}
@@ -1205,6 +1208,6 @@ sci_result_t sci_spi_dma_read_data(uint8_t *data, size_t len, dma_callback_t cal
12051208
}
12061209

12071210
sci_result_t sci_dma_wait_complete(void) {
1208-
dma_wait_complete(DMA_CHANNEL_1);
1211+
dma_wait_complete(sci_dma_rx_config.channel);
12091212
return check_sci_errors();
12101213
}

0 commit comments

Comments
 (0)