[fw-isoldr] Added abort to DMAC.

Also added dma_is_running() and change flush to purge cache.

Author: DC-SWAT

firmware/isoldr/loader/kos/arch/dmac.h

@@ -17,10 +17,11 @@
 #ifndef __ARCH_DMAC_H
 #define __ARCH_DMAC_H
 
-#include <sys/cdefs.h>
+#include <kos/cdefs.h>
 __BEGIN_DECLS
 
 #include <stdint.h>
+#include <stdbool.h>
 
 /** \defgroup dmac  DMA Controller API
     \brief          API to use the SH4's DMA Controller
@@ -139,7 +140,7 @@ typedef struct dma_config {
     dma_addrmode_t src_mode, dst_mode;  /**< Source/destination address mode. */
     dma_transmitmode_t transmit_mode;   /**< DMA Transfer transmit mode. */
     dma_callback_t callback;            /**< Optional callback function for
-					     end-of-transfer notification. */
+                                             end-of-transfer notification. */
 } dma_config_t;
 
 /** \brief   DMA address.
@@ -227,6 +228,17 @@ int dma_transfer(const dma_config_t *cfg, dma_addr_t dst, dma_addr_t src,
 */
 void dma_wait_complete(dma_channel_t channel);
 
+/** \brief   Check if a DMA transfer is running
+    \ingroup dmac
+
+    This function will return true if a DMA transfer is running for the given
+    DMA channel.
+
+    \param  channel         The DMA channel to check.
+    \return                 True if a DMA transfer is running, false otherwise.
+*/
+bool dma_is_running(dma_channel_t channel);
+
 /** \brief   Get the remaining size of a DMA transfer
     \ingroup dmac
 
@@ -239,6 +251,15 @@ void dma_wait_complete(dma_channel_t channel);
 */
 size_t dma_transfer_get_remaining(dma_channel_t channel);
 
+/** \brief   Abort a DMA transfer
+    \ingroup dmac
+
+    This function will abort a DMA transfer for the given DMA channel.
+
+    \param  channel         The DMA channel to abort.
+*/
+void dma_transfer_abort(dma_channel_t channel);
+
 /** @} */
 
 __END_DECLS

firmware/isoldr/loader/kos/src/dmac.c

@@ -67,7 +67,7 @@ static dma_addr_t dma_map_src_dst(uintptr_t addr, size_t len, bool is_dst) {
         if(is_dst)
             dcache_inval_range(addr, len);
         else
-            dcache_flush_range(addr, len);
+            dcache_purge_range(addr, len);
         break;
 
     default:
@@ -106,7 +106,7 @@ static const unsigned char dma_unit_size[] = {
 //     channels_cfg[channel]->callback(d);
 // }
 
-uint32_t dma_is_running(dma_channel_t channel) {
+bool dma_is_running(dma_channel_t channel) {
     uint32_t chcr = dmac_read(channel, DMA_REG_CHCR);
 
     return (chcr & (REG_CHCR_TRANSFER_END | REG_CHCR_DMAC_EN)) == REG_CHCR_DMAC_EN;
@@ -125,6 +125,13 @@ void dma_wait_complete(dma_channel_t channel) {
     }
 }
 
+void dma_transfer_abort(dma_channel_t channel) {
+    // irq_disable_scoped();
+
+    dmac_write(channel, DMA_REG_CHCR, 0);
+    // genwait_wake_all((void *)&channels_cfg[channel]);
+}
+
 int dma_transfer(const dma_config_t *cfg, dma_addr_t dst, dma_addr_t src,
                  size_t len, void *cb_data) {
     unsigned int transfer_size = dma_unit_size[cfg->unit_size];