wip

Author: robtaylor

chipflow_lib/platforms/_utils.py

@@ -173,7 +173,10 @@ class Port(pydantic.BaseModel):
     port_name: str
     iomodel: IOModel
     port_power_domain: Optional[PowerDomainName] = None
-    power_pins: Optional[PowerPins] = None
+
+    def model_post_init(self, __context):
+        logger.debug(f"Instantiating port {self.port_name}: {self}")
+        return super().model_post_init(__context)
 
     @property
     def width(self):
@@ -250,29 +253,35 @@ def add_ports(self, component: str, interface: str, ports: Interface):
         self.ports[component][interface] = ports
 
     def populate(self, interfaces: dict, lockfile: Optional['LockFile'] = None):
-        for component, iface in interfaces.items():
-            for k, v in iface['interface']['members'].items():
-                logger.debug(f"Interface {component}.{k}:")
+        for component, ann in interfaces.items():
+            for interface, v in ann['interface']['members'].items():
+                logger.debug(f"Interface {component}.{interface}:")
                 logger.debug(pformat(v))
-                width = count_member_pins(k, v)
-                logger.debug(f"  {k}: total {width} pins")
-                old_ports = lockfile.port_map.get_ports(component, k) if lockfile else None
+                width = count_member_pins(interface, v)
+                logger.debug(f"  {interface}: total {width} pins")
+                old_ports = lockfile.port_map.get_ports(component, interface) if lockfile else None
 
                 if old_ports:
-                    logger.debug(f"  {iface}.{k} found in pins.lock, reusing")
+                    logger.debug(f"  {component}.{interface} found in pins.lock, reusing")
                     logger.debug(pformat(old_ports))
                     old_width = sum([len(p.pins) for p in old_ports.values() if p.pins is not None])
                     if old_width != width:
                         raise ChipFlowError(
-                            f"Interface {component}.{k} has changed size. "
+                            f"Interface {component}.{interface} has changed size. "
                             f"Old size = {old_width}, new size = {width}"
                         )
-                    self.add_ports(component, k, old_ports)
+                    self.add_ports(component, interface, old_ports)
                 else:
-                    for n, p in v:
-                        iomodel: IOModel = p
-                        port = Port(type='io', pins=None, port_name=n, iomodel=iomodel)
-                        self.add_port(component, iface, n, port)
+                    print(f"i {interface}, v {v}")
+                    for name, member in v['members'].items():
+                        print(member)
+                        if member['type'] == 'interface' and 'annotations' in member \
+                        and IO_ANNOTATION_SCHEMA in member['annotations']:
+                            iomodel: IOModel = member['annotations'][IO_ANNOTATION_SCHEMA]
+                            port = Port(type='io', pins=None, port_name=name, iomodel=iomodel)
+                            self.add_port(component, interface, name, port)
+                        else
+
 
     def allocate_power(self, config: 'Config'):
         "Allocate power domains to top level ports"
@@ -348,8 +357,10 @@ def map_ports(c, i, *, port_power_domain, port_name=None, interface_power_domain
                         else:
                             raise ChipFlowError(f"Malformed [chipflow.power.map] section: {c}.{i}.{x} = {v} (unable to interpret '{x}')")
     def allocate_pins(self, config: 'Config', allocate: AllocateFunc, unallocated: Set[Pin]) -> None:
+        logger.debug("Allocating pins")
         for c,v in self.ports.items():
             for i,v in v.items():
+                power_domains = set()
                 for n, port in v.items():
                     if not port.pins:
                         pins = allocate(unallocated, port.width)
@@ -358,10 +369,23 @@ def allocate_pins(self, config: 'Config', allocate: AllocateFunc, unallocated: S
                         logger.debug(f"allocated range: {pins}")
                         unallocated = unallocated - set(pins)
                         port.pins = pins
-                        if port.interface_power_domain:
-                            powerpins = allocate(unallocated, 2)
-                            port.power_pins = PowerPins(powerpins[0], powerpins[1])
-
+                    if port.interface_power_domain:
+                        power_domains.add(port.interface_power_domain)
+                for pd in power_domains:
+                    if pd == '_core':  # core power handled specially
+                        continue
+                    logger.debug(f"Allocating power pins for {c}.{i}, domain {pd}")
+                    powerpins = allocate(unallocated, 2)
+
+                    power_port = '_power_vdd_' + pd
+                    if power_port not in self.ports[c][i]:
+                        self.ports[c][i][power_port] = Port(type='vdd', pins=[powerpins[0]], port_name=power_port,
+                                iomodel=IOModel(width=1, direction=io.Direction.Input, interface_power_domain=pd))
+
+                    power_port = '_power_vss_' + pd
+                    if power_port not in self.ports[c][i]:
+                        self.ports[c][i][power_port] = Port(type='vss', pins=[powerpins[1]], port_name=power_port,
+                                iomodel=IOModel(width=1, direction=io.Direction.Input, interface_power_domain=pd))
 
 def construct_portmap(config: 'Config', interfaces: dict, lockfile: Optional['LockFile'], core: Component, allocate: AllocateFunc, unallocated: Set[Pin]) -> PortMap:
     portmap = PortMap()
@@ -619,11 +643,8 @@ def count_member_pins(name: str, member: Dict[str, Any]) -> int:
        and IO_ANNOTATION_SCHEMA in member['annotations']:
         ioport = member['annotations'][IO_ANNOTATION_SCHEMA]
         width = ioport['width']
-        if 'interface_power_domain' in ioport and ioport['interface_power_domain']:
-            width += 2
         return width
     elif member['type'] == 'interface':
-        logger.warning(f"Interface '{name}' has no IOSignature, pin allocation likely to be wrong")
         width = 0
         for n, v in member['members'].items():
             width += count_member_pins('_'.join([name, n]), v)