@@ -31,13 +31,15 @@ def elaborate(self, platform: SiliconPlatform):
3131 platform .instantiate_ports (m )
3232
3333 # heartbeat led (to confirm clock/reset alive)
34- if ("config " in self ._config ["chipflow" ]["silicon" ] and
34+ if ("debug " in self ._config ["chipflow" ]["silicon" ] and
3535 self ._config ["chipflow" ]["silicon" ]["debug" ]["heartbeat" ]):
3636 heartbeat_ctr = Signal (23 )
3737 m .d .sync += heartbeat_ctr .eq (heartbeat_ctr + 1 )
3838 m .d .comb += platform .request ("heartbeat" ).o .eq (heartbeat_ctr [- 1 ])
3939
4040 top , interfaces = top_interfaces (self ._config )
41+ logger .debug (f"SiliconTop top = { top } , interfaces={ interfaces } " )
42+
4143 for n , t in top .items ():
4244 setattr (m .submodules , n , t )
4345
@@ -129,7 +131,14 @@ def submit(self, rtlil_path, *, dry_run=False):
129131 padname = f"{ iface } { i } "
130132 logger .debug (f"padname={ padname } , port={ port } , loc={ port .pins [i ]} , "
131133 f"dir={ port .direction } , width={ width } " )
132- pads [padname ] = {'loc' : port .pins [i ], 'dir' : port .direction .value }
134+ pads [padname ] = {'loc' : port .pins [i ], 'type' : port .direction .value }
135+ else :
136+ padname = f"{ iface } "
137+
138+ logger .debug (f"padname={ padname } , port={ port } , loc={ port .pins [0 ]} , "
139+ f"dir={ port .direction } , width={ width } " )
140+ pads [padname ] = {'loc' : port .pins [0 ], 'type' : port .direction .value }
141+
133142
134143 config = {
135144 "dependency_versions" : dep_versions ,
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