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Commit 782882b

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fix error message
1 parent 638f7ef commit 782882b

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-2
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2 files changed

+2
-2
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chipflow_lib/platforms/silicon.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -271,7 +271,7 @@ def instantiate_ports(self, m: Module):
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for clock, name in self._config["chipflow"]["clocks"].items():
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if name not in pinlock.package.clocks:
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raise ChipFlowError("Unable to find clock {name} in pinlock")
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raise ChipFlowError(f"Unable to find clock {name} in pinlock")
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port_data = pinlock.package.clocks[name]
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port = SiliconPlatformPort(component, name, port_data, invert=True)

chipflow_lib/platforms/sim.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -77,7 +77,7 @@ def instantiate_ports(self, m: Module):
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for clock, name in self._config["chipflow"]["clocks"].items():
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if name not in pinlock.package.clocks:
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raise ChipFlowError("Unable to find clock {name} in pinlock")
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raise ChipFlowError(f"Unable to find clock {name} in pinlock")
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port_data = pinlock.package.clocks[name]
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port = io.SimulationPort(io.Direction.Input, port_data.width, invert=True, name=f"clock-{name}")

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