small fixes

Author: robtaylor

chipflow_lib/steps/__init__.py

@@ -63,7 +63,7 @@ def _wire_up_ports(m: Module, top, platform):
                 if hasattr(wire, 'i'):
                     m.d.comb += wire.i.eq(port.i ^ inv_mask)
                 if hasattr(wire, 'o'):
-                        m.d.comb += port.o.eq(wire.o)^ inv_mask
+                        m.d.comb += port.o.eq(wire.o^ inv_mask)
                 if hasattr(wire, 'oe'):
-                        m.d.comb += port.oe.eq(wire.oe)^ inv_mask
+                        m.d.comb += port.oe.eq(wire.oe ^ inv_mask)
 

chipflow_lib/steps/silicon.py

@@ -164,7 +164,7 @@ def network_err(e):
                     fh.close()
                 exit(1)
 
-            sp.info(f"> Submitting {submission_name} for project {self.config.project_name} to ChipFlow Cloud {self._chipflow_api_origin}")
+            sp.info(f"> Submitting {submission_name} for project {self.config.chipflow.project_name} to ChipFlow Cloud {self._chipflow_api_origin}")
             sp.start("Sending design to ChipFlow Cloud")
 
             build_submit_url = f"{self._chipflow_api_origin}/build/submit"
@@ -205,8 +205,9 @@ def network_err(e):
                 self._build_status_url = f"{self._chipflow_api_origin}/build/{resp_data['build_id']}/status"
                 self._log_stream_url = f"{self._chipflow_api_origin}/build/{resp_data['build_id']}/logs?follow=true"
 
-                sp.succeed("✅ Design submitted successfully! Build URL: {self._build_url}")
+                sp.succeed(f"✅ Design submitted successfully! Build URL: {self._build_url}")
 
+                exit_code = 0
                 if args.wait:
                     exit_code = self._stream_logs(sp, network_err)
                 if fh: