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Commit 0efca7a

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Nicolas Cornupramodk
andauthored
Let all DEBUG being compiled (#657)
* Fixes for running with all debugs enabled * Change #if DEBUG to #if CORENRN_DEBUG to compile the code * mk_cell_indices() should be used with only cell-permute one * fix bug in CHKPNTDEBUG where ntc.bcptype[i] was accessed by mechanism index rather than index for point process (vector is allocated only for number of point processes) * Do not add user visible option but use -DCORENRN_ENABLE_DEBUG_CODE=ON to enable all debugging code: -DCORENRN_DEBUG -DCHKPNTDEBUG -DCORENRN_DEBUG_QUEUE -DINTERLEAVE_DEBUG * Enable one Github CI configuration with all debugging code Co-authored-by: Pramod Kumbhar <pramod.s.kumbhar@gmail.com>
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+74
-54
lines changed

18 files changed

+74
-54
lines changed

.github/workflows/coreneuron-ci.yml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -34,7 +34,7 @@ jobs:
3434
os: [ ubuntu-18.04, macOS-10.15 ]
3535
config:
3636
# Defaults: CORENRN_ENABLE_MPI=ON
37-
- {cmake_option: "-DCORENRN_ENABLE_MPI=ON", documentation: ON}
37+
- {cmake_option: "-DCORENRN_ENABLE_MPI=ON -DCORENRN_ENABLE_DEBUG_CODE=ON", documentation: ON}
3838
- {cmake_option: "-DCORENRN_ENABLE_MPI_DYNAMIC=ON"}
3939
- {cmake_option: "-DCORENRN_ENABLE_MPI_DYNAMIC=ON -DCORENRN_ENABLE_SHARED=OFF"}
4040
- {cmake_option: "-DCORENRN_ENABLE_MPI=OFF"}

.github/workflows/coverage.yml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -36,7 +36,7 @@ jobs:
3636
working-directory: ${{runner.workspace}}/CoreNeuron
3737
run: |
3838
mkdir build && cd build
39-
cmake .. -DCORENRN_ENABLE_MPI=ON -DCMAKE_C_FLAGS="-coverage -O0" -DCMAKE_CXX_FLAGS="-coverage -O0";
39+
cmake .. -DCORENRN_ENABLE_MPI=ON -DCORENRN_ENABLE_DEBUG_CODE=ON -DCMAKE_C_FLAGS="-coverage -O0" -DCMAKE_CXX_FLAGS="-coverage -O0";
4040
make -j2
4141
(cd ..; lcov --capture --initial --directory . --no-external --output-file build/coverage-base.info)
4242
make test

CMakeLists.txt

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -395,6 +395,11 @@ if(CORENRN_ENABLE_LIKWID_PROFILING)
395395
add_definitions("-DLIKWID_PERFMON")
396396
endif()
397397

398+
# enable debugging code with extra logs to stdout
399+
if(CORENRN_ENABLE_DEBUG_CODE)
400+
add_definitions(-DCORENRN_DEBUG -DCHKPNTDEBUG -DCORENRN_DEBUG_QUEUE -DINTERLEAVE_DEBUG)
401+
endif()
402+
398403
# =============================================================================
399404
# Common CXX flags : ignore unknown pragma warnings
400405
# =============================================================================

coreneuron/io/global_vars.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -161,7 +161,7 @@ void set_globals(const char* path, bool cli_global_seed, int cli_global_seed_val
161161
}
162162
}
163163

164-
#if DEBUG
164+
#if CORENRN_DEBUG
165165
for (const auto& item: *n2v) {
166166
printf("%s %ld %p\n", item.first.c_str(), item.second.first, item.second.second);
167167
}

coreneuron/io/nrn2core_data_init.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -170,7 +170,9 @@ static void nrn2core_tqueue() {
170170
case 2: { // NetCon
171171
int ncindex = ncte->intdata[idat++];
172172
NetCon* nc = nt.netcons + ncindex;
173+
#ifndef CORENRN_DEBUG_QUEUE
173174
#define CORENRN_DEBUG_QUEUE 0
175+
#endif
174176
#if CORENRN_DEBUG_QUEUE
175177
printf("nrn2core_tqueue tid=%d i=%zd type=%d tdeliver=%g NetCon %d\n",
176178
tid,

coreneuron/io/nrn_checkpoint.hpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -76,7 +76,7 @@ extern int patstimtype;
7676
// nrn_setup.cpp and debugging only information which is retrievable from
7777
// NrnThread and Memb_list. Ideally, this should all go away
7878

79-
struct Memb_list_ckpnt {
79+
struct Memb_list_chkpnt {
8080
// debug only
8181
double* data_not_permuted;
8282
Datum* pdata_not_permuted;

coreneuron/io/nrn_setup.cpp

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -524,7 +524,10 @@ void nrn_setup(const char* filesdat,
524524
nrn_setup_cleanup();
525525

526526
#if INTERLEAVE_DEBUG
527-
mk_cell_indices();
527+
// mk_cell_indices debug code is supposed to be used with cell-per-core permutations
528+
if (corenrn_param.cell_interleave_permute == 1) {
529+
mk_cell_indices();
530+
}
528531
#endif
529532

530533
/// Allocate memory for fast_imem calculation
@@ -614,7 +617,7 @@ void read_phasegap(NrnThread& nt, UserParams& userParams) {
614617
F.read_array<int>(si.tar_index.data(), ntar);
615618
}
616619

617-
#if DEBUG
620+
#if CORENRN_DEBUG
618621
printf("%d read_phasegap tid=%d nsrc=%d ntar=%d\n", nrnmpi_myid, nt.id, nsrc, ntar);
619622
for (int i = 0; i < nsrc; ++i) {
620623
printf("src %z %d %d\n", size_t(si.src_sid[i]), si.src_type[i], si.src_index[i]);

coreneuron/io/phase2.cpp

Lines changed: 24 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -707,7 +707,7 @@ void Phase2::set_dependencies(const NrnThread& nt, const std::vector<Memb_func>&
707707
free(mech_deps);
708708
}
709709

710-
void Phase2::handle_weights(NrnThread& nt, int n_netcon) {
710+
void Phase2::handle_weights(NrnThread& nt, int n_netcon, NrnThreadChkpnt& ntc) {
711711
nt.n_weight = weights.size();
712712
// weights in netcons order in groups defined by Point_process target type.
713713
nt.weights = (double*) ecalloc_align(nt.n_weight, sizeof(double));
@@ -731,21 +731,24 @@ void Phase2::handle_weights(NrnThread& nt, int n_netcon) {
731731

732732
#if CHKPNTDEBUG
733733
ntc.delay = new double[n_netcon];
734-
memcpy(ntc.delay, delay, n_netcon * sizeof(double));
734+
memcpy(ntc.delay, delay.data(), n_netcon * sizeof(double));
735735
#endif
736736
for (int i = 0; i < n_netcon; ++i) {
737737
NetCon& nc = nt.netcons[i];
738738
nc.delay_ = delay[i];
739739
}
740740
}
741741

742-
void Phase2::get_info_from_bbcore(NrnThread& nt, const std::vector<Memb_func>& memb_func) {
742+
void Phase2::get_info_from_bbcore(NrnThread& nt,
743+
const std::vector<Memb_func>& memb_func,
744+
NrnThreadChkpnt& ntc) {
743745
// BBCOREPOINTER information
744746
#if CHKPNTDEBUG
745747
ntc.nbcp = num_point_process;
746-
ntc.bcpicnt = new int[num_point_process];
747-
ntc.bcpdcnt = new int[num_point_process];
748-
ntc.bcptype = new int[num_point_process];
748+
ntc.bcpicnt = new int[n_mech];
749+
ntc.bcpdcnt = new int[n_mech];
750+
ntc.bcptype = new int[n_mech];
751+
size_t point_proc_id = 0;
749752
#endif
750753
for (size_t i = 0; i < n_mech; ++i) {
751754
int type = mech_types[i];
@@ -754,9 +757,10 @@ void Phase2::get_info_from_bbcore(NrnThread& nt, const std::vector<Memb_func>& m
754757
}
755758
type = tmls[i].type; // This is not an error, but it has to be fixed I think
756759
#if CHKPNTDEBUG
757-
ntc.bcptype[i] = type;
758-
ntc.bcpicnt[i] = icnt;
759-
ntc.bcpdcnt[i] = dcnt;
760+
ntc.bcptype[point_proc_id] = type;
761+
ntc.bcpicnt[point_proc_id] = tmls[i].iArray.size();
762+
ntc.bcpdcnt[point_proc_id] = tmls[i].dArray.size();
763+
point_proc_id++;
760764
#endif
761765
int ik = 0;
762766
int dk = 0;
@@ -792,7 +796,7 @@ void Phase2::get_info_from_bbcore(NrnThread& nt, const std::vector<Memb_func>& m
792796
}
793797
}
794798

795-
void Phase2::set_vec_play(NrnThread& nt) {
799+
void Phase2::set_vec_play(NrnThread& nt, NrnThreadChkpnt& ntc) {
796800
// VecPlayContinuous instances
797801
// No attempt at memory efficiency
798802
nt.n_vecplay = vec_play_continuous.size();
@@ -851,7 +855,7 @@ void Phase2::populate(NrnThread& nt, const UserParams& userParams) {
851855
auto& memb_func = corenrn.get_memb_funcs();
852856
#if CHKPNTDEBUG
853857
ntc.mlmap = new Memb_list_chkpnt*[memb_func.size()];
854-
for (int i = 0; i < _memb_func.size(); ++i) {
858+
for (int i = 0; i < memb_func.size(); ++i) {
855859
ntc.mlmap[i] = nullptr;
856860
}
857861
#endif
@@ -994,7 +998,7 @@ void Phase2::populate(NrnThread& nt, const UserParams& userParams) {
994998
mech_data_layout_transform<int>(ml->pdata, n, szdp, layout);
995999

9961000
#if CHKPNTDEBUG // Not substantive. Only for debugging.
997-
Memb_list_ckpnt* mlc = ntc.mlmap[type];
1001+
Memb_list_chkpnt* mlc = ntc.mlmap[type];
9981002
mlc->pdata_not_permuted = (int*) coreneuron::ecalloc_align(n * szdp, sizeof(int));
9991003
if (layout == Layout::AoS) { // only copy
10001004
for (int i = 0; i < n; ++i) {
@@ -1064,7 +1068,7 @@ void Phase2::populate(NrnThread& nt, const UserParams& userParams) {
10641068
permute_ptr(nt._v_parent_index, nt.end, p);
10651069
node_permute(nt._v_parent_index, nt.end, p);
10661070

1067-
#if DEBUG
1071+
#if CORENRN_DEBUG
10681072
for (int i = 0; i < nt.end; ++i) {
10691073
printf("parent[%d] = %d\n", i, nt._v_parent_index[i]);
10701074
}
@@ -1129,15 +1133,15 @@ void Phase2::populate(NrnThread& nt, const UserParams& userParams) {
11291133
// nt.presyns order same as output_vindex order
11301134
#if CHKPNTDEBUG
11311135
ntc.output_vindex = new int[nt.n_presyn];
1132-
memcpy(ntc.output_vindex, output_vindex, nt.n_presyn * sizeof(int));
1136+
memcpy(ntc.output_vindex, output_vindex.data(), nt.n_presyn * sizeof(int));
11331137
#endif
11341138
if (nt._permute) {
11351139
// only indices >= 0 (i.e. _actual_v indices) will be changed.
11361140
node_permute(output_vindex.data(), nt.n_presyn, nt._permute);
11371141
}
11381142
#if CHKPNTDEBUG
11391143
ntc.output_threshold = new double[nt.ncell];
1140-
memcpy(ntc.output_threshold, output_threshold, nt.ncell * sizeof(double));
1144+
memcpy(ntc.output_threshold, output_threshold.data(), nt.ncell * sizeof(double));
11411145
#endif
11421146
for (int i = 0; i < nt.n_presyn; ++i) { // real cells
11431147
PreSyn* ps = nt.presyns + i;
@@ -1182,8 +1186,8 @@ void Phase2::populate(NrnThread& nt, const UserParams& userParams) {
11821186
#if CHKPNTDEBUG
11831187
ntc.pnttype = new int[nnetcon];
11841188
ntc.pntindex = new int[nnetcon];
1185-
memcpy(ntc.pnttype, pnttype, nnetcon * sizeof(int));
1186-
memcpy(ntc.pntindex, pntindex, nnetcon * sizeof(int));
1189+
memcpy(ntc.pnttype, pnttype.data(), nnetcon * sizeof(int));
1190+
memcpy(ntc.pntindex, pntindex.data(), nnetcon * sizeof(int));
11871191
#endif
11881192
for (int i = 0; i < nnetcon; ++i) {
11891193
int type = pnttype[i];
@@ -1196,11 +1200,11 @@ void Phase2::populate(NrnThread& nt, const UserParams& userParams) {
11961200
}
11971201
}
11981202

1199-
handle_weights(nt, nnetcon);
1203+
handle_weights(nt, nnetcon, ntc);
12001204

1201-
get_info_from_bbcore(nt, memb_func);
1205+
get_info_from_bbcore(nt, memb_func, ntc);
12021206

1203-
set_vec_play(nt);
1207+
set_vec_play(nt, ntc);
12041208

12051209
if (!events.empty()) {
12061210
userParams.checkPoints.restore_tqueue(nt, *this);

coreneuron/io/phase2.hpp

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -19,6 +19,7 @@ struct NrnThread;
1919
struct NrnThreadMembList;
2020
struct Memb_func;
2121
struct Memb_list;
22+
class NrnThreadChkpnt;
2223

2324
class Phase2 {
2425
public:
@@ -82,9 +83,11 @@ class Phase2 {
8283
void fill_before_after_lists(NrnThread& nt, const std::vector<Memb_func>& memb_func);
8384
void pdata_relocation(const NrnThread& nt, const std::vector<Memb_func>& memb_func);
8485
void set_dependencies(const NrnThread& nt, const std::vector<Memb_func>& memb_func);
85-
void handle_weights(NrnThread& nt, int n_netcon);
86-
void get_info_from_bbcore(NrnThread& nt, const std::vector<Memb_func>& memb_func);
87-
void set_vec_play(NrnThread& nt);
86+
void handle_weights(NrnThread& nt, int n_netcon, NrnThreadChkpnt& ntc);
87+
void get_info_from_bbcore(NrnThread& nt,
88+
const std::vector<Memb_func>& memb_func,
89+
NrnThreadChkpnt& ntc);
90+
void set_vec_play(NrnThread& nt, NrnThreadChkpnt& ntc);
8891

8992
int n_output;
9093
int n_real_output;

coreneuron/mechanism/register_mech.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -165,7 +165,7 @@ void nrn_writes_conc(int type, int /* unused */) {
165165
if (type == -1)
166166
return;
167167

168-
#if DEBUG
168+
#if CORENRN_DEBUG
169169
printf("%s reordered from %d to %d\n", corenrn.get_memb_func(type).sym, type, lastion);
170170
#endif
171171
if (nrn_is_ion(type)) {
@@ -243,7 +243,7 @@ void hoc_register_dparam_semantics(int type, int ix, const char* name) {
243243
ion_write_depend(type, etype);
244244
}
245245
}
246-
#if DEBUG
246+
#if CORENRN_DEBUG
247247
printf("dparam semantics %s ix=%d %s %d\n",
248248
memb_func[type].sym,
249249
ix,

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