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Incorrect computation of extra stack size for vararg calls in RISC-V (#213)
Currently, the extra size for the variable arguments is too small for the 64 bit RISC-V and the extra arguments are stored in the wrong stack slots.
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riscV/Asmexpand.ml

Lines changed: 2 additions & 2 deletions
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@@ -483,7 +483,7 @@ let expand_instruction instr =
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emit (Pmv (X30, X2));
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if sg.sig_cc.cc_vararg then begin
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let n = arguments_size sg in
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let extra_sz = if n >= 8 then 0 else align 16 ((8 - n) * wordsize) in
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let extra_sz = if n >= 8 then 0 else align ((8 - n) * wordsize) 16 in
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let full_sz = Z.add sz (Z.of_uint extra_sz) in
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expand_addptrofs X2 X2 (Ptrofs.repr (Z.neg full_sz));
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expand_storeind_ptr X30 X2 ofs;
@@ -501,7 +501,7 @@ let expand_instruction instr =
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let extra_sz =
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if sg.sig_cc.cc_vararg then begin
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let n = arguments_size sg in
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if n >= 8 then 0 else align 16 ((8 - n) * wordsize)
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if n >= 8 then 0 else align ((8 - n) * wordsize) 16
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end else 0 in
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expand_addptrofs X2 X2 (Ptrofs.repr (Z.add sz (Z.of_uint extra_sz)))
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