Merge pull request #11562 from VVESTM/vve_h7_memmap

STM32H7: memory relocation

Author: 0xc0170

targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/TOOLCHAIN_ARM_STD/startup_stm32h743xx.S

@@ -24,7 +24,7 @@
 ;*
 ;******************************************************************************
 
-__initial_sp    EQU     0x20020000 ; Top of RAM
+            IMPORT |Image$$ARM_LIB_STACK$$ZI$$Limit|
 
                 PRESERVE8
                 THUMB
@@ -36,7 +36,7 @@ __initial_sp    EQU     0x20020000 ; Top of RAM
                 EXPORT  __Vectors_End
                 EXPORT  __Vectors_Size
 
-__Vectors       DCD     __initial_sp                      ; Top of Stack
+__Vectors       DCD     |Image$$ARM_LIB_STACK$$ZI$$Limit| ; Top of Stack
                 DCD     Reset_Handler                     ; Reset Handler
                 DCD     NMI_Handler                       ; NMI Handler
                 DCD     HardFault_Handler                 ; Hard Fault Handler

targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/TOOLCHAIN_ARM_STD/stm32h743xI.sct

@@ -44,12 +44,12 @@
 
 #define MBED_RAM_START              0x24000000
 #define MBED_RAM_SIZE               0x80000
-#define MBED_VECTTABLE_RAM_START    (MBED_RAM_START)
+#define MBED_VECTTABLE_RAM_START    0x20000000
 #define MBED_VECTTABLE_RAM_SIZE     0x298
 #define MBED_CRASH_REPORT_RAM_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE)
 #define MBED_CRASH_REPORT_RAM_SIZE  0x100
-#define MBED_RAM0_START             (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
-#define MBED_RAM0_SIZE              (MBED_RAM_SIZE - MBED_VECTTABLE_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
+#define MBED_RAM0_START             (MBED_RAM_START)
+#define MBED_RAM0_SIZE              (MBED_RAM_SIZE)
 
 LR_IROM1 MBED_APP_START MBED_APP_SIZE  {    ; load region size_region
 

targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/TOOLCHAIN_GCC_ARM/STM32H743xI.ld

@@ -19,8 +19,8 @@ M_CRASH_DATA_RAM_SIZE = 0x100;
 MEMORY
 { 
   FLASH (rx)     : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
-  DTCMRAM (rwx)  : ORIGIN = 0x20000000, LENGTH = 128K
-  RAM (xrw)      : ORIGIN = 0x24000298, LENGTH = 512K - 0x298  /* end = 0x24080000 */
+  DTCMRAM (rwx)  : ORIGIN = 0x20000298, LENGTH = 128K-0x298
+  RAM (xrw)      : ORIGIN = 0x24000000, LENGTH = 512K
   RAM_D2 (xrw)   : ORIGIN = 0x30000000, LENGTH = 288K
   RAM_D3 (xrw)   : ORIGIN = 0x38000000, LENGTH = 64K
   ITCMRAM (xrw)  : ORIGIN = 0x00000000, LENGTH = 64K
@@ -108,7 +108,7 @@ SECTIONS
         . += M_CRASH_DATA_RAM_SIZE;
         . = ALIGN(8);
         __CRASH_DATA_RAM_END__ = .; /* Define a global symbol at data end */
-    } > RAM
+    } > DTCMRAM
 
     .data : AT (__etext)
     {

targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/TOOLCHAIN_IAR/stm32h743xI.icf

@@ -10,11 +10,11 @@ define symbol __region_ROM_end__   = MBED_APP_START + MBED_APP_SIZE - 1;
 // 512KB RAM (0x80000)
 // Vector table dynamic copy: 166 vectors = 664 bytes (0x298) reserved
 // Crash data area: 256 bytes (0x100) reserved
-define symbol __NVIC_start__                  = 0x24000000;
-define symbol __NVIC_end__                    = 0x24000297;
-define symbol __region_CRASH_DATA_RAM_start__ = 0x24000298; // Aligned on 8 bytes
-define symbol __region_CRASH_DATA_RAM_end__   = 0x24000397;
-define symbol __region_RAM_start__            = 0x24000398; // Aligned on 8 bytes
+define symbol __NVIC_start__                  = 0x20000000;
+define symbol __NVIC_end__                    = 0x20000297;
+define symbol __region_CRASH_DATA_RAM_start__ = 0x20000298; // Aligned on 8 bytes
+define symbol __region_CRASH_DATA_RAM_end__   = 0x20000397;
+define symbol __region_RAM_start__            = 0x24000000; // Aligned on 8 bytes
 define symbol __region_RAM_end__              = 0x24000000 + 0x80000 - 1;
 
 // Memory regions