1- /*
1+ /*
22 * Copyright (c) 2016 Nordic Semiconductor ASA
33 * All rights reserved.
4- *
4+ *
55 * Redistribution and use in source and binary forms, with or without modification,
66 * are permitted provided that the following conditions are met:
7- *
8- * 1. Redistributions of source code must retain the above copyright notice, this list
7+ *
8+ * 1. Redistributions of source code must retain the above copyright notice, this list
99 * of conditions and the following disclaimer.
1010 *
11- * 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
12- * integrated circuit in a product or a software update for such product, must reproduce
13- * the above copyright notice, this list of conditions and the following disclaimer in
11+ * 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
12+ * integrated circuit in a product or a software update for such product, must reproduce
13+ * the above copyright notice, this list of conditions and the following disclaimer in
1414 * the documentation and/or other materials provided with the distribution.
1515 *
16- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
17- * used to endorse or promote products derived from this software without specific prior
16+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
17+ * used to endorse or promote products derived from this software without specific prior
1818 * written permission.
1919 *
20- * 4. This software, with or without modification, must only be used with a
20+ * 4. This software, with or without modification, must only be used with a
2121 * Nordic Semiconductor ASA integrated circuit.
2222 *
23- * 5. Any software provided in binary or object form under this license must not be reverse
24- * engineered, decompiled, modified and/or disassembled.
25- *
23+ * 5. Any software provided in binary or object form under this license must not be reverse
24+ * engineered, decompiled, modified and/or disassembled.
25+ *
2626 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
2727 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
2828 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
3333 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3434 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
3535 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36- *
36+ *
3737 */
38-
38+
3939#include "nrf.h"
4040#include "cmsis_nvic.h"
4141#include "stdint.h"
4848#endif
4949
5050#if defined(__ARMCC_VERSION )
51- __attribute__ ((section (".bss.nvictable" )))
52- uint32_t nrf_dispatch_vector [NVIC_NUM_VECTORS ];
51+ __attribute__((section (".bss.nvictable" )))
52+ uint32_t nrf_dispatch_vector [NVIC_NUM_VECTORS ];
5353#elif defined(__GNUC__ )
54- __attribute__ ((section (".nvictable" )))
55- uint32_t nrf_dispatch_vector [NVIC_NUM_VECTORS ];
54+ __attribute__((section (".nvictable" )))
55+ uint32_t nrf_dispatch_vector [NVIC_NUM_VECTORS ];
5656#elif defined(__ICCARM__ )
57- uint32_t nrf_dispatch_vector [NVIC_NUM_VECTORS ] @ ".nvictable" ;
57+ uint32_t nrf_dispatch_vector [NVIC_NUM_VECTORS ] @ ".nvictable" ;
5858#endif
5959
60+ #include "platform/mbed_toolchain.h"
61+ #include "subtarget_init.h"
62+
6063extern uint32_t __Vectors [];
6164
6265#define VECTORS_FLASH_START __Vectors
@@ -70,21 +73,21 @@ extern uint32_t __Vectors[];
7073void nrf_reloc_vector_table (void )
7174{
7275 // Copy and switch to dynamic vectors
73- uint32_t * old_vectors = VECTORS_FLASH_START ;
74- uint32_t i ;
75- for (i = 0 ; i < NVIC_NUM_VECTORS ; i ++ ) {
76- nrf_dispatch_vector [i ] = old_vectors [i ];
77- }
76+ uint32_t * old_vectors = VECTORS_FLASH_START ;
77+ uint32_t i ;
78+ for (i = 0 ; i < NVIC_NUM_VECTORS ; i ++ ) {
79+ nrf_dispatch_vector [i ] = old_vectors [i ];
80+ }
7881
7982#if defined(SOFTDEVICE_PRESENT )
8083
8184 /**
8285 * Before setting the new vector table address in the SoftDevice the MBR must be initialized.
8386 * If no bootloader is present the MBR will be initialized automatically.
8487 * If a bootloader is present nrf_dfu_mbr_init_sd must be called once and only once.
85- *
88+ *
8689 * By resetting the MBR and SoftDevice VTOR address first, it becomes safe to initialize
87- * the MBR again regardless of how the application was started.
90+ * the MBR again regardless of how the application was started.
8891 */
8992
9093 /* Reset MBR VTOR to original state before calling MBR init. */
@@ -98,7 +101,7 @@ void nrf_reloc_vector_table(void)
98101 /* Set SCB->VTOR to go through MBR to trap SoftDevice service calls. */
99102 SCB -> VTOR = 0x0 ;
100103
101- /* Initialize MBR so SoftDevice service calls are being trapped correctly.
104+ /* Initialize MBR so SoftDevice service calls are being trapped correctly.
102105 * This call sets MBR_VTOR_ADDRESS to point to the SoftDevice's VTOR at address 0x1000.
103106 */
104107 nrf_dfu_mbr_init_sd ();
@@ -109,17 +112,18 @@ void nrf_reloc_vector_table(void)
109112#else
110113
111114 /* No SoftDevice is present. Set all interrupts to vector table in RAM. */
112- SCB -> VTOR = (uint32_t ) nrf_dispatch_vector ;
115+ SCB -> VTOR = (uint32_t ) nrf_dispatch_vector ;
113116#endif
114117}
115118
116-
117119void mbed_sdk_init (void )
118120{
119- if (STDIO_UART_RTS != NC ) {
120- gpio_t rts ;
121- gpio_init_out (& rts , STDIO_UART_RTS );
122- /* Set STDIO_UART_RTS as gpio driven low */
123- gpio_write (& rts , 0 );
124- }
121+ if (STDIO_UART_RTS != NC ) {
122+ gpio_t rts ;
123+ gpio_init_out (& rts , STDIO_UART_RTS );
124+ /* Set STDIO_UART_RTS as gpio driven low */
125+ gpio_write (& rts , 0 );
126+ }
127+
128+ subtarget_sdk_init ();
125129}
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