Adding support for SD (through external SDHI driver), USBDEVICE, LPTICKER.

Linker files synced with other Renesas boards.

Author: mbedNoobNinja

targets/TARGET_RENESAS/TARGET_RZ_A1XX/PeripheralPins.h

@@ -61,4 +61,17 @@ extern const PinMap PinMap_PWM[];
 extern const PinMap PinMap_CAN_RD[];
 extern const PinMap PinMap_CAN_TD[];
 
+#if DEVICE_SDHI
+/************SDHI***************/
+extern const PinMap PinMap_SDHI_WP[];
+extern const PinMap PinMap_SDHI_CD[];
+extern const PinMap PinMap_SDHI_CLK[];
+extern const PinMap PinMap_SDHI_CMD[];
+extern const PinMap PinMap_SDHI_D0[];
+extern const PinMap PinMap_SDHI_D1[];
+extern const PinMap PinMap_SDHI_D2[];
+extern const PinMap PinMap_SDHI_D3[];
 #endif
+
+#endif
+

targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_VK_RZ_A1H/PeripheralNames.h

@@ -97,6 +97,11 @@ typedef enum {
     CAN_4,
 } CANName;
 
+typedef enum {
+    SDHI_0 = 0,
+    SDHI_1
+} SDHIName;
+
 
 #define STDIO_UART_TX     USBTX
 #define STDIO_UART_RX     USBRX

targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_VK_RZ_A1H/PeripheralPins.c

@@ -538,3 +538,51 @@ const PinMap PinMap_CAN_TD[] = {
 #endif
 };
 
+const PinMap PinMap_SDHI_D0[] = {
+    {P4_11 , SDHI_0, 3},
+    {P3_11 , SDHI_1, 7},
+    {NC    , NC    , 0}
+};
+
+const PinMap PinMap_SDHI_D1[] = {
+    {P4_10 , SDHI_0, 3},
+    {P3_10 , SDHI_1, 7},
+    {NC    , NC    , 0}
+};
+
+const PinMap PinMap_SDHI_D2[] = {
+    {P4_15 , SDHI_0, 3},
+    {P3_15 , SDHI_1, 7},
+    {NC    , NC    , 0}
+};
+
+const PinMap PinMap_SDHI_D3[] = {
+    {P4_14 , SDHI_0, 3},
+    {P3_14 , SDHI_1, 7},
+    {NC    , NC    , 0}
+};
+
+const PinMap PinMap_SDHI_CLK[] = {
+    {P4_12 , SDHI_0, 3},
+    {P3_12 , SDHI_1, 7},
+    {NC    , NC    , 0}
+};
+
+const PinMap PinMap_SDHI_CMD[] = {
+    {P4_13 , SDHI_0, 3},
+    {P3_13 , SDHI_1, 7},
+    {NC    , NC    , 0}
+};
+
+const PinMap PinMap_SDHI_CD[] = {
+    {P4_8  , SDHI_0, 3},
+    {P3_8  , SDHI_1, 7},
+    {NC    , NC    , 0}
+};
+
+const PinMap PinMap_SDHI_WP[] = {
+    {P4_9  , SDHI_0, 3},
+    {P3_9  , SDHI_1, 7},
+    {NC    , NC    , 0}
+};
+

targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_VK_RZ_A1H/device/TOOLCHAIN_ARM_STD/VKRZA1H.sct

@@ -12,17 +12,22 @@
 #ifdef RUN_FROM_SDRAM
  #define __ROM_BASE       0x08000000
  #define __ROM_SIZE       0x02000000
- #define __VECTOR_BASE    0x08000000
  #define __DATA_BASE	  +0 ALIGN 0x100000
 #elif defined (RUN_FROM_SRAM)
  #define __ROM_BASE       0x200A0000
  #define __ROM_SIZE       0x00960000
- #define __VECTOR_BASE    0x200A0000
  #define __DATA_BASE	  +0 ALIGN 0x100000 NOCOMPRESS
 #else
- #define __ROM_BASE       0x18020000
- #define __ROM_SIZE       0x01FE0000
- #define __VECTOR_BASE    0x18020000
+ #if !defined(MBED_APP_START)
+  #define MBED_APP_START 0x18020000
+ #endif
+
+ #if !defined(MBED_APP_SIZE)
+  #define MBED_APP_SIZE 0x1FE0000
+ #endif
+
+ #define __ROM_BASE       MBED_APP_START
+ #define __ROM_SIZE       MBED_APP_SIZE
  #define __DATA_BASE	  0x20020000
 #endif
 
@@ -56,7 +61,7 @@ LOAD_TTB    __TTB_BASE __TTB_SIZE ; Page 0 of On-Chip Data Retention RAM
 
 LR_IROM1 __ROM_BASE __ROM_SIZE       ; load region size_region
 {
-  VECTORS __VECTOR_BASE FIXED
+  VECTORS __ROM_BASE FIXED
   {
     * (RESET, +FIRST)         ; Vector table and other startup code
     * (InRoot$$Sections)      ; All (library) code that must be in a root region
@@ -66,13 +71,16 @@ LR_IROM1 __ROM_BASE __ROM_SIZE       ; load region size_region
   RO_DATA    +0
   { * (+RO-DATA) }              ; Application RO data (.constdata)
 
-  RW_DATA    __DATA_BASE
+  RAM_CODE   __DATA_BASE
+  { * (RAM_CODE) }              ; Application RAM_CODE
+
+  RW_DATA     +0 ALIGN 0x8
   { * (+RW) }                   ; Application RW data (.data)
 
   RW_IRAM1    +0 ALIGN 0x10
   { * (+ZI) }                   ; Application ZI data (.bss)
 
-  ARM_LIB_HEAP  +0
+  ARM_LIB_HEAP  +0 ALIGN 0x8
   { * (HEAP) }                  ; Application heap area (HEAP)
 
   ARM_LIB_STACK (__RAM_BASE + __NM_RAM_SIZE) EMPTY -__STACK_SIZE      ; Stack region growing down

targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_VK_RZ_A1H/device/TOOLCHAIN_ARM_STD/sys.cpp

@@ -1,7 +1,7 @@
 /* Linker script for mbed VK_RZ_A1H */
 
 /* Linker script to configure memory regions. */
-/*
+
 #ifdef RUN_FROM_SDRAM
 MEMORY
 {
@@ -11,7 +11,7 @@ MEMORY
   SRAM (rwx) : ORIGIN = 0x200A0000, LENGTH = 0x00960000
 }
 REGION_ALIAS("SFLASH", RAM);
-TTBOFFSET = 1M;
+/*TTBOFFSET = 1M;*/
 
 #elif defined (RUN_FROM_SRAM)
 MEMORY
@@ -22,19 +22,30 @@ MEMORY
   SDRAM  (rwx) : ORIGIN = 0x08000000, LENGTH = 0x02000000
 }
 REGION_ALIAS("SFLASH", RAM);
-TTBOFFSET = 1M;
+/*TTBOFFSET = 1M;*/
 #else
-*/
+
+#if !defined(MBED_APP_START)
+  #define MBED_APP_START 0x18020000
+#endif
+
+#if !defined(MBED_APP_SIZE)
+  #define MBED_APP_SIZE 0x1FE0000
+#endif
+
+  #define SFLASH_ADDR         MBED_APP_START
+  #define SFLASH_SIZE         MBED_APP_SIZE
+
 MEMORY
 {
   ROM   (rx)  : ORIGIN = 0x00000000, LENGTH = 0x02000000
-  SFLASH (rx) : ORIGIN = 0x18020000, LENGTH = 0x01FE0000 
+  SFLASH (rx) : ORIGIN = SFLASH_ADDR, LENGTH = SFLASH_SIZE 
   L_TTB (rw)  : ORIGIN = 0x20000000, LENGTH = 0x00004000 
   RAM (rwx) : ORIGIN = 0x20020000, LENGTH = 0x008E0000
   RAM_NC (rwx) : ORIGIN = 0x20900000, LENGTH = 0x00100000
   SDRAM  (rwx) : ORIGIN = 0x08000000, LENGTH = 0x02000000
 }
-/*#endif*/
+#endif
 
 /* Linker script to place sections and symbol values. Should be used together
  * with other linker script that defines memory regions FLASH and RAM.
@@ -122,6 +133,9 @@ SECTIONS
         LONG (__etext2)
         LONG (__nc_data_start)
         LONG (__nc_data_end - __nc_data_start)
+        LONG (LOADADDR(.ram_code))
+        LONG (ADDR(.ram_code))
+        LONG (SIZEOF(.ram_code))
         __copy_table_end__ = .;
     } > SFLASH
 
@@ -136,7 +150,21 @@ SECTIONS
         __zero_table_end__ = .;
     } > SFLASH
 
-    __etext = .;
+    .ram_code : ALIGN( 0x8 ) {
+        __ram_code_load  = .;
+        __ram_code_start = LOADADDR(.ram_code) + ( __ram_code_load - ADDR(.ram_code) );
+
+        *(RAM_CODE)
+
+        *(RAM_CONST)
+
+        . = ALIGN( 0x8 );
+        __ram_code_end = LOADADDR(.ram_code) + ( . - ADDR(.ram_code) );
+    } > RAM AT > SFLASH
+
+    Load$$SEC_RAM_CODE$$Base    = LOADADDR(.ram_code);
+    Image$$SEC_RAM_CODE$$Base   = ADDR(.ram_code);
+    Load$$SEC_RAM_CODE$$Length  = SIZEOF(.ram_code);
 
     .ttb :
     {
@@ -145,6 +173,8 @@ SECTIONS
         Image$$TTB$$ZI$$Limit = .;
     } > L_TTB
 
+    __etext = Load$$SEC_RAM_CODE$$Base + SIZEOF(.ram_code);
+
     .data : AT (__etext)
     {
         Image$$RW_DATA$$Base = .;

targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_VK_RZ_A1H/device/TOOLCHAIN_GCC_ARM/VKRZA1H.ld

@@ -216,27 +216,4 @@ goToSleep:
     .pool
     .size Reset_Handler, . - Reset_Handler
 
-
-    .text
-
-/*    Macro to define default handlers. Default handler
- *    will be weak symbol and just dead loops. They can be
- *    overwritten by other handlers */
-                .macro    def_default_handler    handler_name
-                .align 1
-                .thumb_func
-                .weak    \handler_name
-                .type    \handler_name, %function
-\handler_name :
-                b    .
-                .size    \handler_name, . - \handler_name
-                .endm
-
-                def_default_handler    Undef_Handler
-                def_default_handler    SVC_Handler
-                def_default_handler    PAbt_Handler
-                def_default_handler    DAbt_Handler
-                def_default_handler    IRQ_Handler
-                def_default_handler    FIQ_Handler
-
-                .END
+    .end