Merge pull request #10034 from evgenibo/flash_protected_region_config

PSA: PSoc 6 configurable secure memory size

Author: 0xc0170

features/storage/kvstore/conf/tdb_internal/mbed_lib.json

@@ -17,7 +17,7 @@
         },
         "CY8CKIT_062_WIFI_BT_M0_PSA": {
             "internal_size": "0x8000",
-            "internal_base_address": "0x10078000"
+            "internal_base_address": "0x10038000"
         },
         "LPC55S69_S": {
             "internal_size": "0x10000",

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT_M0_PSA/cyprotection_config.h

@@ -1,5 +1,5 @@
 /* mbed Microcontroller Library
-* 
+*
 * \copyright
 
 * (c) 2018, Cypress Semiconductor Corporation
@@ -25,6 +25,7 @@
 #define _CYPROTECTION_CONFIG_H_
 
 #include "cyprotection.h"
+#include "mbed_assert.h"
 
 /* Add to M0_PSA target in targets.json:
  * - INITIAL_ROT_PROTECTION_AVAILABLE - to disable pc0 related protections
@@ -42,10 +43,46 @@ CY_PROT_PCMASK3 + CY_PROT_PCMASK4)
 
 #define ALL_SUBREGIONS (0x0)
 
+
+/* protected rom region size */
+
+#if PSA_SECURE_ROM_SIZE == 0x10000
+    #define CY_PROT_ROM_REGION_SIZE       CY_PROT_SIZE_64KB    /* 0x10000 */
+#elif PSA_SECURE_ROM_SIZE == 0x20000
+    #define CY_PROT_ROM_REGION_SIZE       CY_PROT_SIZE_128KB   /* 0x20000 */
+#elif PSA_SECURE_ROM_SIZE == 0x40000
+    #define CY_PROT_ROM_REGION_SIZE       CY_PROT_SIZE_256KB   /* 0x40000 */
+#elif PSA_SECURE_ROM_SIZE == 0x80000
+    #define CY_PROT_ROM_REGION_SIZE       CY_PROT_SIZE_512KB   /* 0x80000 */
+#elif PSA_SECURE_ROM_SIZE == 0x100000
+    #define CY_PROT_ROM_REGION_SIZE       CY_PROT_SIZE_1MB     /* 0x100000 */
+#else
+    #error unsupported protected rom region size - not aligned or out of range
+#endif
+
+
+/* protected ram region size */
+
+#if PSA_SECURE_RAM_SIZE == 0x8000
+    #define CY_PROT_RAM_REGION_SIZE       CY_PROT_SIZE_32KB  /* 0x8000 */
+#elif PSA_SECURE_RAM_SIZE == 0x10000
+    #define CY_PROT_RAM_REGION_SIZE       CY_PROT_SIZE_64KB  /* 0x10000 */
+#elif PSA_SECURE_RAM_SIZE == 0x20000
+    #define CY_PROT_RAM_REGION_SIZE       CY_PROT_SIZE_128KB /* 0x20000 */
+#elif PSA_SECURE_RAM_SIZE == 0x40000
+    #define CY_PROT_RAM_REGION_SIZE       CY_PROT_SIZE_256KB /* 0x40000 */
+#else
+    #error unsupported protected ram region size - not aligned or out of range
+#endif
+
+MBED_STATIC_ASSERT((PSA_SECURE_ROM_START % PSA_SECURE_ROM_SIZE) == 0, "PSA_SECURE_ROM_START is not alligned with PSA_SECURE_ROM_SIZE");
+MBED_STATIC_ASSERT((PSA_SECURE_RAM_START % PSA_SECURE_RAM_SIZE) == 0, "PSA_SECURE_RAM_START is not alligned with PSA_SECURE_RAM_SIZE");
+
+
 const cy_smpu_region_config_t flash_spm_smpu_config[] = {
     {   /* FLASH_PC1_SPM */
         .address = (uint32_t *)PSA_SECURE_ROM_START, /* 0x10000000 */
-        .regionSize = CY_PROT_SIZE_512KB, /* 0x80000 */
+        .regionSize = CY_PROT_ROM_REGION_SIZE,
         .subregions = ALL_SUBREGIONS,
         .userPermission = CY_PROT_PERM_RWX,
         .privPermission = CY_PROT_PERM_RWX,
@@ -62,7 +99,7 @@ const cy_smpu_region_config_t flash_spm_smpu_config[] = {
 const cy_smpu_region_config_t sram_spm_smpu_config[] = {
     {   /* SRAM_SPM_PRIV - must include SRAM_SPM_PUB area */
         .address = (uint32_t *)PSA_SECURE_RAM_START, /* 0x08020000 */
-        .regionSize = CY_PROT_SIZE_64KB, /* 0x10000 */
+        .regionSize = CY_PROT_RAM_REGION_SIZE,
         .subregions = ALL_SUBREGIONS, /* 0xC0, /*Size 0xC000 ALL_SUBREGIONS,*/
         .userPermission = CY_PROT_PERM_DISABLED,
         .privPermission = CY_PROT_PERM_RWX,