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Merge pull request #11303 from jeromecoutant/PR_H743ZI2_480
NUCLEO_H743ZI2 : increase system clock from 400 MHz to 480 MHz
2 parents 9203c88 + be78084 commit a65ed8c

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‎features/netsocket/emac-drivers/TARGET_STM_EMAC/TARGET_STM32H7/stm32h7_eth_init.c‎ renamed to ‎features/netsocket/emac-drivers/TARGET_STM_EMAC/TARGET_STM32H7/TARGET_NUCLEO_H743ZI/stm32h7_eth_init.c‎

File renamed without changes.

‎features/netsocket/emac-drivers/TARGET_STM_EMAC/TARGET_STM32H7/TARGET_NUCLEO_H743ZI2/stm32h7_eth_init.c‎

Lines changed: 162 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,162 @@
1+
/* mbed Microcontroller Library
2+
* Copyright (c) 2018, STMicroelectronics
3+
* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19+
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
20+
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22+
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
23+
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
24+
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
25+
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26+
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27+
*/
28+
29+
#ifndef USE_USER_DEFINED_HAL_ETH_MSPINIT
30+
31+
#include "stm32h7xx_hal.h"
32+
33+
#define MCO_Pin GPIO_PIN_0
34+
#define MCO_GPIO_Port GPIOH
35+
#define RMII_MDC_Pin GPIO_PIN_1
36+
#define RMII_MDC_GPIO_Port GPIOC
37+
#define RMII_REF_CLK_Pin GPIO_PIN_1
38+
#define RMII_REF_CLK_GPIO_Port GPIOA
39+
#define RMII_MDIO_Pin GPIO_PIN_2
40+
#define RMII_MDIO_GPIO_Port GPIOA
41+
#define RMII_CRS_DV_Pin GPIO_PIN_7
42+
#define RMII_CRS_DV_GPIO_Port GPIOA
43+
#define RMII_RXD0_Pin GPIO_PIN_4
44+
#define RMII_RXD0_GPIO_Port GPIOC
45+
#define RMII_RXD1_Pin GPIO_PIN_5
46+
#define RMII_RXD1_GPIO_Port GPIOC
47+
#define RMII_TXD1_Pin GPIO_PIN_13
48+
#define RMII_TXD1_GPIO_Port GPIOB
49+
#define TMS_Pin GPIO_PIN_13
50+
#define TMS_GPIO_Port GPIOA
51+
#define TCK_Pin GPIO_PIN_14
52+
#define TCK_GPIO_Port GPIOA
53+
#define RMII_TX_EN_Pin GPIO_PIN_11
54+
#define RMII_TX_EN_GPIO_Port GPIOG
55+
#define RMII_TXD0_Pin GPIO_PIN_13
56+
#define RMII_TXD0_GPIO_Port GPIOG
57+
58+
/**
59+
* Override HAL Eth Init function
60+
*/
61+
void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
62+
{
63+
GPIO_InitTypeDef GPIO_InitStruct;
64+
if(heth->Instance == ETH)
65+
{
66+
/* Disable DCache for STM32H7 family */
67+
SCB_DisableDCache();
68+
69+
/* GPIO Ports Clock Enable */
70+
__HAL_RCC_GPIOH_CLK_ENABLE();
71+
__HAL_RCC_GPIOC_CLK_ENABLE();
72+
__HAL_RCC_GPIOA_CLK_ENABLE();
73+
__HAL_RCC_GPIOB_CLK_ENABLE();
74+
__HAL_RCC_GPIOG_CLK_ENABLE();
75+
76+
/* Enable Peripheral clock */
77+
__HAL_RCC_ETH1MAC_CLK_ENABLE();
78+
__HAL_RCC_ETH1TX_CLK_ENABLE();
79+
__HAL_RCC_ETH1RX_CLK_ENABLE();
80+
81+
/**ETH GPIO Configuration
82+
PC1 ------> ETH_MDC
83+
PA1 ------> ETH_REF_CLK
84+
PA2 ------> ETH_MDIO
85+
PA7 ------> ETH_CRS_DV
86+
PC4 ------> ETH_RXD0
87+
PC5 ------> ETH_RXD1
88+
PB13 ------> ETH_TXD1
89+
PG11 ------> ETH_TX_EN
90+
PG13 ------> ETH_TXD0
91+
*/
92+
GPIO_InitStruct.Pin = RMII_MDC_Pin;
93+
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
94+
GPIO_InitStruct.Pull = GPIO_NOPULL;
95+
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
96+
GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
97+
HAL_GPIO_Init(RMII_MDC_GPIO_Port, &GPIO_InitStruct);
98+
99+
GPIO_InitStruct.Pin = RMII_REF_CLK_Pin|RMII_MDIO_Pin|RMII_CRS_DV_Pin;
100+
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
101+
GPIO_InitStruct.Pull = GPIO_NOPULL;
102+
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
103+
GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
104+
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
105+
106+
GPIO_InitStruct.Pin = RMII_RXD0_Pin|RMII_RXD1_Pin;
107+
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
108+
GPIO_InitStruct.Pull = GPIO_NOPULL;
109+
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
110+
GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
111+
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
112+
113+
GPIO_InitStruct.Pin = RMII_TXD1_Pin;
114+
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
115+
GPIO_InitStruct.Pull = GPIO_NOPULL;
116+
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
117+
GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
118+
HAL_GPIO_Init(RMII_TXD1_GPIO_Port, &GPIO_InitStruct);
119+
120+
GPIO_InitStruct.Pin = RMII_TX_EN_Pin|RMII_TXD0_Pin;
121+
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
122+
GPIO_InitStruct.Pull = GPIO_NOPULL;
123+
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
124+
GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
125+
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
126+
}
127+
}
128+
129+
/**
130+
* Override HAL Eth DeInit function
131+
*/
132+
void HAL_ETH_MspDeInit(ETH_HandleTypeDef *heth)
133+
{
134+
if(heth->Instance == ETH)
135+
{
136+
/* Disable Peripheral clock */
137+
__HAL_RCC_ETH1MAC_CLK_DISABLE();
138+
__HAL_RCC_ETH1TX_CLK_DISABLE();
139+
__HAL_RCC_ETH1RX_CLK_DISABLE();
140+
141+
/**ETH GPIO Configuration
142+
PC1 ------> ETH_MDC
143+
PA1 ------> ETH_REF_CLK
144+
PA2 ------> ETH_MDIO
145+
PA7 ------> ETH_CRS_DV
146+
PC4 ------> ETH_RXD0
147+
PC5 ------> ETH_RXD1
148+
PB13 ------> ETH_TXD1
149+
PG11 ------> ETH_TX_EN
150+
PG13 ------> ETH_TXD0
151+
*/
152+
HAL_GPIO_DeInit(GPIOC, RMII_MDC_Pin|RMII_RXD0_Pin|RMII_RXD1_Pin);
153+
154+
HAL_GPIO_DeInit(GPIOA, RMII_REF_CLK_Pin|RMII_MDIO_Pin|RMII_CRS_DV_Pin);
155+
156+
HAL_GPIO_DeInit(RMII_TXD1_GPIO_Port, RMII_TXD1_Pin);
157+
158+
HAL_GPIO_DeInit(GPIOG, RMII_TX_EN_Pin|RMII_TXD0_Pin);
159+
}
160+
}
161+
162+
#endif /* USE_USER_DEFINED_HAL_ETH_MSPINIT */

‎features/netsocket/emac-drivers/TARGET_STM_EMAC/TARGET_STM32H7/TARGET_NUCLEO_H743ZI/lan8742/lan8742.c‎ renamed to ‎features/netsocket/emac-drivers/TARGET_STM_EMAC/TARGET_STM32H7/lan8742/lan8742.c‎

File renamed without changes.

‎features/netsocket/emac-drivers/TARGET_STM_EMAC/TARGET_STM32H7/TARGET_NUCLEO_H743ZI/lan8742/lan8742.h‎ renamed to ‎features/netsocket/emac-drivers/TARGET_STM_EMAC/TARGET_STM32H7/lan8742/lan8742.h‎

File renamed without changes.

‎targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI/PeripheralPins.c‎

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -135,8 +135,8 @@ MBED_WEAK const PinMap PinMap_DAC[] = {
135135
//*** I2C ***
136136

137137
MBED_WEAK const PinMap PinMap_I2C_SDA[] = {
138-
{PB_7, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, // Connected to LD2 [Blue] // NUCLEO_H743ZI
139-
{PB_7_ALT0, I2C_4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)}, // Connected to LD2 [Blue] // NUCLEO_H743ZI
138+
{PB_7, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, // Connected to LD2 [Blue]
139+
{PB_7_ALT0, I2C_4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)}, // Connected to LD2 [Blue]
140140
{PB_9, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
141141
{PB_9_ALT0, I2C_4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)},
142142
{PB_11, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
@@ -199,8 +199,8 @@ MBED_WEAK const PinMap PinMap_PWM[] = {
199199
{PB_5, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
200200
{PB_6, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
201201
{PB_6_ALT0, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 1)}, // TIM16_CH1N
202-
{PB_7, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 // Connected to LD2 [Blue] // NUCLEO_H743ZI
203-
{PB_7_ALT0, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 1)}, // TIM17_CH1N // Connected to LD2 [Blue] // NUCLEO_H743ZI
202+
{PB_7, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 // Connected to LD2 [Blue]
203+
{PB_7_ALT0, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 1)}, // TIM17_CH1N // Connected to LD2 [Blue]
204204
{PB_8, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
205205
{PB_8_ALT0, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 0)}, // TIM16_CH1
206206
{PB_9, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
@@ -269,7 +269,7 @@ MBED_WEAK const PinMap PinMap_UART_TX[] = {
269269
{PD_1, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
270270
{PD_5, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
271271
{PD_8, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, // Connected to STDIO_UART_TX
272-
{PE_1, UART_8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, // Connected to LD2 [Yellow Led] // NUCLEO_H743ZI2
272+
{PE_1, UART_8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)},
273273
{PE_8, UART_7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)},
274274
{PF_7, UART_7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)},
275275
{PG_14, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)},
@@ -285,8 +285,8 @@ MBED_WEAK const PinMap PinMap_UART_RX[] = {
285285
{PA_11, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_UART4)}, // Connected to USB_DM
286286
{PB_3, UART_7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART7)},
287287
{PB_5, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)},
288-
{PB_7, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, // Connected to LD2 [Blue] // NUCLEO_H743ZI
289-
{PB_7_ALT0, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART)}, // Connected to LD2 [Blue] // NUCLEO_H743ZI
288+
{PB_7, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, // Connected to LD2 [Blue]
289+
{PB_7_ALT0, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART)}, // Connected to LD2 [Blue]
290290
{PB_8, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
291291
{PB_11, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
292292
{PB_12, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)},

‎targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI/PinNames.h‎

Lines changed: 0 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -240,38 +240,18 @@ typedef enum {
240240
A0 = PA_3,
241241
A1 = PC_0,
242242
A2 = PC_3,
243-
#ifdef TARGET_NUCLEO_H743ZI2
244-
A3 = PB_1,
245-
A4 = PC_2,
246-
#else
247243
A3 = PF_3,
248244
A4 = PF_5,
249-
#endif
250245
A5 = PF_10,
251-
#ifdef TARGET_NUCLEO_H743ZI2
252-
D0 = PB_7,
253-
D1 = PB_6,
254-
D2 = PG_14,
255-
#else
256246
D0 = PG_9,
257247
D1 = PG_14,
258248
D2 = PF_15,
259-
#endif
260249
D3 = PE_13,
261-
#ifdef TARGET_NUCLEO_H743ZI2
262-
D4 = PE_14,
263-
#else
264250
D4 = PF_14,
265-
#endif
266251
D5 = PE_11,
267252
D6 = PE_9,
268-
#ifdef TARGET_NUCLEO_H743ZI2
269-
D7 = PG_12,
270-
D8 = PF_3,
271-
#else
272253
D7 = PF_13,
273254
D8 = PF_12,
274-
#endif
275255
D9 = PD_15,
276256
D10 = PD_14,
277257
D11 = STM32_D11_SPI_ETHERNET_PIN, /* config in targets.json file */
@@ -294,11 +274,7 @@ typedef enum {
294274

295275
// Generic signals namings
296276
LED1 = PB_0, // LD1 = GREEN
297-
#ifdef TARGET_NUCLEO_H743ZI2
298-
LED2 = PE_1, // Yellow
299-
#else
300277
LED2 = PB_7, // Blue
301-
#endif
302278
LED3 = PB_14, // Red
303279
LED4 = PB_0, // LD4 is not user, mapped to LD1
304280

‎targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI/system_clock.c‎

Lines changed: 4 additions & 31 deletions
Original file line numberDiff line numberDiff line change
@@ -96,28 +96,14 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
9696
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
9797
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
9898

99-
__HAL_RCC_SYSCFG_CLK_ENABLE(); // Mandatory for I/O Compensation Cell
100-
MODIFY_REG(PWR->CR3, PWR_CR3_SCUEN, 0);
101-
102-
103-
/*!< Supply configuration update enable */
104-
// HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
105-
/* The voltage scaling allows optimizing the power consumption when the device is
106-
clocked below the maximum system frequency, to update the voltage scaling value
107-
regarding system frequency refer to product datasheet. */
99+
/* Supply configuration update enable */
100+
HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
101+
/* Configure the main internal regulator output voltage */
108102
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
109-
while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
110103

111-
// NEEDED ???
112-
/* Select CSI as system clock source to allow modification of the PLL configuration */
113-
//RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK;
114-
//RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_CSI;
115-
//if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) {
116-
// return 0; // FAIL
117-
//}
104+
while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
118105

119106
/* Enable HSE Oscillator and activate PLL with HSE as source */
120-
//RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI48;
121107
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI48;
122108
if (bypass) {
123109
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS;
@@ -161,19 +147,6 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
161147
return 0; // FAIL
162148
}
163149

164-
/* Disable CSI Oscillator */
165-
//RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_CSI;
166-
//RCC_OscInitStruct.CSIState = RCC_CSI_OFF;
167-
//RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
168-
//if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
169-
// return 0;
170-
//}
171-
172-
// NEEDED ???
173-
/* Enables the I/O Compensation Cell */
174-
// __HAL_RCC_CSI_ENABLE(); // Mandatory for I/O Compensation Cell
175-
// HAL_EnableCompensationCell();
176-
177150
return 1; // OK
178151
}
179152
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */

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