@@ -34,14 +34,14 @@ extern void SetSysClock(void);
3434
3535#if MBED_CONF_TARGET_LSE_AVAILABLE
3636
37- #if defined( STM32F410Tx ) || defined( STM32F410Cx ) || defined( STM32F410Rx ) || defined( STM32F411xE ) || defined( STM32F446xx ) || defined( STM32F469xx ) || defined( STM32F479xx ) || defined( STM32F412Zx ) || \
38- defined( STM32F412Vx ) || defined( STM32F412Rx ) || defined( STM32F412Cx ) || defined( STM32F413xx ) || defined( STM32F423xx )
37+ // set defaults for LSE drive load level, with exception for F4_g2 MCU
38+ #ifdef RCC_LSE_HIGHDRIVE_MODE
3939# if MBED_CONF_TARGET_LSE_DRIVE_LOAD_LEVEL
4040# define LSE_DRIVE_LOAD_LEVEL MBED_CONF_TARGET_LSE_DRIVE_LOAD_LEVEL
4141# else
4242# define LSE_DRIVE_LOAD_LEVEL RCC_LSE_HIGHDRIVE_MODE
4343# endif
44- #else // defined(STM32F4xx)
44+ #else
4545# if MBED_CONF_TARGET_LSE_DRIVE_LOAD_LEVEL
4646# define LSE_DRIVE_LOAD_LEVEL MBED_CONF_TARGET_LSE_DRIVE_LOAD_LEVEL
4747# else
@@ -80,13 +80,12 @@ static void LSEDriveConfig(void) {
8080 }
8181
8282 // set LSE drive level. Exception only for F4_g2 series
83- #if defined(STM32F410Tx ) || defined(STM32F410Cx ) || defined(STM32F410Rx ) || defined(STM32F411xE ) || defined(STM32F446xx ) || defined(STM32F469xx ) || defined(STM32F479xx ) || defined(STM32F412Zx ) || \
84- defined(STM32F412Vx ) || defined(STM32F412Rx ) || defined(STM32F412Cx ) || defined(STM32F413xx ) || defined(STM32F423xx )
85- HAL_RCCEx_SelectLSEMode (LSE_DRIVE_LOAD_LEVEL );
86- #else
8783 HAL_PWR_EnableBkUpAccess ();
88- __HAL_RCC_LSEDRIVE_CONFIG (LSE_DRIVE_LOAD_LEVEL );
89- #endif
84+ #ifdef __HAL_RCC_LSEDRIVE_CONFIG
85+ __HAL_RCC_LSEDRIVE_CONFIG (LSE_DRIVE_LOAD_LEVEL );
86+ #else
87+ HAL_RCCEx_SelectLSEMode (LSE_DRIVE_LOAD_LEVEL );
88+ #endif
9089}
9190#endif // MBED_CONF_TARGET_LSE_AVAILABLE
9291
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