@@ -387,7 +387,7 @@ qspi_status_t qspi_init_direct(qspi_t *obj, const qspi_pinmap_t *pinmap, uint32_
387387static qspi_status_t _qspi_init_direct (qspi_t * obj , const qspi_pinmap_t * pinmap , uint32_t hz , uint8_t mode )
388388#endif
389389{
390- tr_info ("qspi_init mode %u" , mode );
390+ tr_debug ("qspi_init mode %u" , mode );
391391
392392 // Reset handle internal state
393393 obj -> handle .State = HAL_OSPI_STATE_RESET ;
@@ -535,7 +535,7 @@ qspi_status_t qspi_init_direct(qspi_t *obj, const qspi_pinmap_t *pinmap, uint32_
535535static qspi_status_t _qspi_init_direct (qspi_t * obj , const qspi_pinmap_t * pinmap , uint32_t hz , uint8_t mode )
536536#endif
537537{
538- tr_info ("qspi_init mode %u" , mode );
538+ tr_debug ("qspi_init mode %u" , mode );
539539 // Enable interface clock for QSPI
540540 __HAL_RCC_QSPI_CLK_ENABLE ();
541541
@@ -632,7 +632,7 @@ qspi_status_t qspi_init(qspi_t *obj, PinName io0, PinName io1, PinName io2, PinN
632632#if defined(OCTOSPI1 )
633633qspi_status_t qspi_free (qspi_t * obj )
634634{
635- tr_info ("qspi_free" );
635+ tr_debug ("qspi_free" );
636636 if (HAL_OSPI_DeInit (& obj -> handle ) != HAL_OK ) {
637637 return QSPI_STATUS_ERROR ;
638638 }
@@ -664,7 +664,7 @@ qspi_status_t qspi_free(qspi_t *obj)
664664#else /* OCTOSPI */
665665qspi_status_t qspi_free (qspi_t * obj )
666666{
667- tr_info ("qspi_free" );
667+ tr_debug ("qspi_free" );
668668
669669 if (HAL_QSPI_DeInit (& obj -> handle ) != HAL_OK ) {
670670 return QSPI_STATUS_ERROR ;
@@ -701,7 +701,7 @@ qspi_status_t qspi_free(qspi_t *obj)
701701#if defined(OCTOSPI1 )
702702qspi_status_t qspi_frequency (qspi_t * obj , int hz )
703703{
704- tr_info ("qspi_frequency hz %d" , hz );
704+ tr_debug ("qspi_frequency hz %d" , hz );
705705 qspi_status_t status = QSPI_STATUS_OK ;
706706
707707 /* HCLK drives QSPI. QSPI clock depends on prescaler value:
@@ -728,7 +728,7 @@ qspi_status_t qspi_frequency(qspi_t *obj, int hz)
728728#else /* OCTOSPI */
729729qspi_status_t qspi_frequency (qspi_t * obj , int hz )
730730{
731- tr_info ("qspi_frequency hz %d" , hz );
731+ tr_debug ("qspi_frequency hz %d" , hz );
732732 qspi_status_t status = QSPI_STATUS_OK ;
733733
734734 /* HCLK drives QSPI. QSPI clock depends on prescaler value:
@@ -863,7 +863,7 @@ qspi_status_t qspi_read(qspi_t *obj, const qspi_command_t *command, void *data,
863863#if defined(OCTOSPI1 )
864864qspi_status_t qspi_command_transfer (qspi_t * obj , const qspi_command_t * command , const void * tx_data , size_t tx_size , void * rx_data , size_t rx_size )
865865{
866- tr_info ("qspi_command_transfer tx %u rx %u command %#04x" , tx_size , rx_size , command -> instruction .value );
866+ tr_debug ("qspi_command_transfer tx %u rx %u command %#04x" , tx_size , rx_size , command -> instruction .value );
867867
868868 qspi_status_t status = QSPI_STATUS_OK ;
869869
@@ -903,7 +903,7 @@ qspi_status_t qspi_command_transfer(qspi_t *obj, const qspi_command_t *command,
903903#else /* OCTOSPI */
904904qspi_status_t qspi_command_transfer (qspi_t * obj , const qspi_command_t * command , const void * tx_data , size_t tx_size , void * rx_data , size_t rx_size )
905905{
906- tr_info ("qspi_command_transfer tx %u rx %u command %#04x" , tx_size , rx_size , command -> instruction .value );
906+ tr_debug ("qspi_command_transfer tx %u rx %u command %#04x" , tx_size , rx_size , command -> instruction .value );
907907 qspi_status_t status = QSPI_STATUS_OK ;
908908
909909 if ((tx_data == NULL || tx_size == 0 ) && (rx_data == NULL || rx_size == 0 )) {
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