Updated linker scripts and startup file for ARM - fixes tests-mbedmicro-rtos-mbed-heap_and_stack failure on ARM compiler.

Author: romanjoe

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_064_SB/device/TARGET_MCU_PSOC6_M4/TOOLCHAIN_ARM/cyb06xx7_cm4_dual.sct

@@ -67,11 +67,11 @@
 #endif
 
 #if !defined(MBED_RAM_START)
-  #define MBED_RAM_START    0x08002000
+  #define MBED_RAM_START    0x08000000
 #endif
 
 #if !defined(MBED_RAM_SIZE)
-  #define MBED_RAM_SIZE     0x0001E000
+  #define MBED_RAM_SIZE     0x00020000
 #endif
 
 #if !defined(MBED_BOOT_STACK_SIZE)
@@ -133,24 +133,10 @@
 #define EFUSE_START             0x90700000
 #define EFUSE_SIZE              0x100000
 
-; Size and start address of the Cortex-M0+ application image
-#define FLASH_CM0P_SIZE         0x40000
-#define FLASH_CM0P_START        (FLASH_START + FLASH_SIZE - FLASH_CM0P_SIZE)
-
 ; Size and start address of the Cortex-M4 application image
-#define FLASH_CM4_SIZE          (FLASH_SIZE - FLASH_CM0P_SIZE)
+#define FLASH_CM4_SIZE          FLASH_SIZE
 #define FLASH_CM4_START         FLASH_START
 
-
-; Cortex-M0+ application image
-LR_IROM FLASH_CM0P_START FLASH_CM0P_SIZE
-{
-    .cy_m0p_image +0 FLASH_CM0P_SIZE
-    {
-        * (.cy_m0p_image)
-    }
-}
-
 ; Cortex-M4 application image
 LR_IROM1 FLASH_CM4_START FLASH_CM4_SIZE
 {
@@ -184,13 +170,15 @@ LR_IROM1 FLASH_CM4_START FLASH_CM4_SIZE
     }
 
     ; Application heap area (HEAP)
-    ARM_LIB_HEAP  +0 EMPTY ((RAM_START+RAM_SIZE)-AlignExpr(ImageLimit(RW_IRAM1), 8)-STACK_SIZE)
+    ARM_LIB_HEAP  +0
     { 
+        * (HEAP) 
     }
 
     ; Stack region growing down
-    ARM_LIB_STACK (RAM_START+RAM_SIZE) EMPTY -STACK_SIZE
+    ARM_LIB_STACK RAM_START+RAM_SIZE -STACK_SIZE 
     {
+        * (STACK)
     }
 
     ; Used for the digital signature of the secure application and the

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_064_SB/device/TARGET_MCU_PSOC6_M4/TOOLCHAIN_ARM/startup_psoc6_01_cm4.S

@@ -23,6 +23,36 @@
 ; * limitations under the License.
 ; */
 
+;/*
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+;*/
+
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+                IF :DEF:__STACK_SIZE
+Stack_Size      EQU     __STACK_SIZE
+                ELSE
+Stack_Size      EQU     0x00000400
+                ENDIF
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+                IF :DEF:__HEAP_SIZE
+Heap_Size       EQU     __HEAP_SIZE
+                ELSE
+Heap_Size       EQU     0x00000400
+                ENDIF
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+
                 PRESERVE8
                 THUMB
 
@@ -33,9 +63,7 @@
                 EXPORT  __Vectors_End
                 EXPORT  __Vectors_Size
 
-                IMPORT |Image$$ARM_LIB_STACK$$Base|
-__Vectors       DCD    |Image$$ARM_LIB_STACK$$Base| ; Top of Stack
-
+__Vectors       DCD     __initial_sp              ; Top of Stack
                 DCD     Reset_Handler             ; Reset Handler
 
                 DCD     0x0000000D                            ; NMI Handler located at ROM code
@@ -635,7 +663,20 @@ pass_interrupt_dacs_IRQHandler
 
 
 ; User Initial Stack & Heap
-                IMPORT   __use_two_region_memory
+
+                IF      :DEF:__MICROLIB
+
+                EXPORT  __initial_sp
+                EXPORT  __heap_base
+                EXPORT  __heap_limit
+
+                ELSE
+
+                IMPORT __use_two_region_memory
+
+                ALIGN
+
+                ENDIF
 
                 END
 

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_064_SB/device/TARGET_MCU_PSOC6_M4/TOOLCHAIN_GCC_ARM/cyb06xx7_cm4_dual.ld

@@ -65,11 +65,11 @@ ENTRY(Reset_Handler)
 #endif
 
 #if !defined(MBED_RAM_START)
-  #define MBED_RAM_START    0x08002000
+  #define MBED_RAM_START    0x08000000
 #endif
 
 #if !defined(MBED_RAM_SIZE)
-  #define MBED_RAM_SIZE     0x0001E000
+  #define MBED_RAM_SIZE     0x00020000
 #endif
 
 #if !defined(MBED_BOOT_STACK_SIZE)
@@ -118,11 +118,8 @@ MEMORY
     efuse             (r)     : ORIGIN = 0x90700000, LENGTH = 0x100000     /*   1 MB */
 }
 
-/* Size and start address of the Cortex-M0+ application image */
-FLASH_CM0P_SIZE  = 0x40000;
-FLASH_CM0P_START = ORIGIN(flash) + LENGTH(flash) - FLASH_CM0P_SIZE;
 /* Size and start address of the Cortex-M4 application image */
-FLASH_CM4_SIZE   = LENGTH(flash) - FLASH_CM0P_SIZE;
+FLASH_CM4_SIZE   = LENGTH(flash);
 FLASH_CM4_START  = ORIGIN(flash);
 
 /* Library configurations */
@@ -164,15 +161,6 @@ GROUP(libgcc.a libc.a libm.a libnosys.a)
 
 SECTIONS
 {
-     /* Cortex-M0+ application image */
-    .cy_m0p_image FLASH_CM0P_START :
-    {
-        . = ALIGN(4);
-        __cy_m0p_code_start = . ;
-        KEEP(*(.cy_m0p_image))
-        __cy_m0p_code_end = . ;
-    } > flash
-
     /* Cortex-M4 application image */
     .text FLASH_CM4_START :
     {

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_064_SB/device/TARGET_MCU_PSOC6_M4/TOOLCHAIN_IAR/cyb06xx7_cm4_dual.icf

@@ -66,11 +66,11 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) {
 }
 
 if (!isdefinedsymbol(MBED_RAM_START)) {
-  define symbol MBED_RAM_START = 0x08002000;
+  define symbol MBED_RAM_START = 0x08000000;
 }
 
 if (!isdefinedsymbol(MBED_RAM_SIZE)) {
-  define symbol MBED_RAM_SIZE = 0x0001E000;
+  define symbol MBED_RAM_SIZE = 0x00020000;
 }
 
 if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {