1- /* mbed Microcontroller Library
2- * Copyright (c) 2017, ARM Limited
3- * All rights reserved.
1+ /*
2+ * Copyright (c) 2017, Arm Limited and affiliates.
3+ * Copyright (c) 2017, STMicroelectronics.
4+ * SPDX-License-Identifier: Apache-2.0
45 *
5- * Redistribution and use in source and binary forms, with or without
6- * modification, are permitted provided that the following conditions are met:
6+ * Licensed under the Apache License, Version 2.0 (the "License");
7+ * you may not use this file except in compliance with the License.
8+ * You may obtain a copy of the License at
79 *
8- * 1. Redistributions of source code must retain the above copyright notice,
9- * this list of conditions and the following disclaimer.
10- * 2. Redistributions in binary form must reproduce the above copyright notice,
11- * this list of conditions and the following disclaimer in the documentation
12- * and/or other materials provided with the distribution.
13- * 3. Neither the name of STMicroelectronics nor the names of its contributors
14- * may be used to endorse or promote products derived from this software
15- * without specific prior written permission.
10+ * http://www.apache.org/licenses/LICENSE-2.0
1611 *
17- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
20- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
21- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
23- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
24- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
25- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
12+ * Unless required by applicable law or agreed to in writing, software
13+ * distributed under the License is distributed on an "AS IS" BASIS,
14+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15+ * See the License for the specific language governing permissions and
16+ * limitations under the License.
2717 */
2818
2919#if DEVICE_QSPI
3525#include "pinmap.h"
3626#include "PeripheralPins.h"
3727
38- // activate / de-activate debug
28+ #include "mbed-trace/mbed_trace.h"
29+
30+ #if defined(OCTOSPI1 )
31+ #define TRACE_GROUP "STOS"
32+ #else
33+ #define TRACE_GROUP "STQS"
34+ #endif /* OCTOSPI1 */
35+
36+ // activate / de-activate extra debug
3937#define qspi_api_c_debug 0
4038
4139/* Max amount of flash size is 4Gbytes */
@@ -389,7 +387,7 @@ qspi_status_t qspi_init_direct(qspi_t *obj, const qspi_pinmap_t *pinmap, uint32_
389387static qspi_status_t _qspi_init_direct (qspi_t * obj , const qspi_pinmap_t * pinmap , uint32_t hz , uint8_t mode )
390388#endif
391389{
392- debug_if ( qspi_api_c_debug , "qspi_init mode %u\n " , mode );
390+ tr_info ( "qspi_init mode %u" , mode );
393391
394392 // Reset handle internal state
395393 obj -> handle .State = HAL_OSPI_STATE_RESET ;
@@ -488,7 +486,7 @@ static qspi_status_t _qspi_init_direct(qspi_t *obj, const qspi_pinmap_t *pinmap,
488486 }
489487
490488 if (HAL_OSPIM_Config (& obj -> handle , & OSPIM_Cfg_Struct , HAL_OSPI_TIMEOUT_DEFAULT_VALUE ) != HAL_OK ) {
491- debug_if ( qspi_api_c_debug , "HAL_OSPIM_Config error\n " );
489+ tr_error ( "HAL_OSPIM_Config error" );
492490 return QSPI_STATUS_ERROR ;
493491 }
494492#endif
@@ -535,7 +533,7 @@ qspi_status_t qspi_init_direct(qspi_t *obj, const qspi_pinmap_t *pinmap, uint32_
535533static qspi_status_t _qspi_init_direct (qspi_t * obj , const qspi_pinmap_t * pinmap , uint32_t hz , uint8_t mode )
536534#endif
537535{
538- debug_if ( qspi_api_c_debug , "qspi_init mode %u\n " , mode );
536+ tr_info ( "qspi_init mode %u" , mode );
539537 // Enable interface clock for QSPI
540538 __HAL_RCC_QSPI_CLK_ENABLE ();
541539
@@ -632,7 +630,7 @@ qspi_status_t qspi_init(qspi_t *obj, PinName io0, PinName io1, PinName io2, PinN
632630#if defined(OCTOSPI1 )
633631qspi_status_t qspi_free (qspi_t * obj )
634632{
635- debug_if ( qspi_api_c_debug , "qspi_free\n " );
633+ tr_info ( "qspi_free" );
636634 if (HAL_OSPI_DeInit (& obj -> handle ) != HAL_OK ) {
637635 return QSPI_STATUS_ERROR ;
638636 }
@@ -664,6 +662,8 @@ qspi_status_t qspi_free(qspi_t *obj)
664662#else /* OCTOSPI */
665663qspi_status_t qspi_free (qspi_t * obj )
666664{
665+ tr_info ("qspi_free" );
666+
667667 if (HAL_QSPI_DeInit (& obj -> handle ) != HAL_OK ) {
668668 return QSPI_STATUS_ERROR ;
669669 }
@@ -699,7 +699,7 @@ qspi_status_t qspi_free(qspi_t *obj)
699699#if defined(OCTOSPI1 )
700700qspi_status_t qspi_frequency (qspi_t * obj , int hz )
701701{
702- debug_if ( qspi_api_c_debug , "qspi_frequency hz %d\n " , hz );
702+ tr_info ( "qspi_frequency hz %d" , hz );
703703 qspi_status_t status = QSPI_STATUS_OK ;
704704
705705 /* HCLK drives QSPI. QSPI clock depends on prescaler value:
@@ -721,7 +721,7 @@ qspi_status_t qspi_frequency(qspi_t *obj, int hz)
721721 obj -> handle .Init .ClockPrescaler = div ;
722722
723723 if (HAL_OSPI_Init (& obj -> handle ) != HAL_OK ) {
724- debug_if ( qspi_api_c_debug , "HAL_OSPI_Init error\n " );
724+ tr_error ( "HAL_OSPI_Init error" );
725725 status = QSPI_STATUS_ERROR ;
726726 }
727727
@@ -730,7 +730,7 @@ qspi_status_t qspi_frequency(qspi_t *obj, int hz)
730730#else /* OCTOSPI */
731731qspi_status_t qspi_frequency (qspi_t * obj , int hz )
732732{
733- debug_if ( qspi_api_c_debug , "qspi_frequency hz %d\n " , hz );
733+ tr_info ( "qspi_frequency hz %d" , hz );
734734 qspi_status_t status = QSPI_STATUS_OK ;
735735
736736 /* HCLK drives QSPI. QSPI clock depends on prescaler value:
@@ -774,11 +774,11 @@ qspi_status_t qspi_write(qspi_t *obj, const qspi_command_t *command, const void
774774 st_command .NbData = * length ;
775775
776776 if (HAL_OSPI_Command (& obj -> handle , & st_command , HAL_OSPI_TIMEOUT_DEFAULT_VALUE ) != HAL_OK ) {
777- debug_if ( qspi_api_c_debug , "HAL_OSPI_Command error\n " );
777+ tr_error ( "HAL_OSPI_Command error" );
778778 status = QSPI_STATUS_ERROR ;
779779 } else {
780780 if (HAL_OSPI_Transmit (& obj -> handle , (uint8_t * )data , HAL_OSPI_TIMEOUT_DEFAULT_VALUE ) != HAL_OK ) {
781- debug_if ( qspi_api_c_debug , "HAL_OSPI_Transmit error\n " );
781+ tr_error ( "HAL_OSPI_Transmit error" );
782782 status = QSPI_STATUS_ERROR ;
783783 }
784784 }
@@ -788,6 +788,8 @@ qspi_status_t qspi_write(qspi_t *obj, const qspi_command_t *command, const void
788788#else /* OCTOSPI */
789789qspi_status_t qspi_write (qspi_t * obj , const qspi_command_t * command , const void * data , size_t * length )
790790{
791+ debug_if (qspi_api_c_debug , "qspi_write size %u\n" , * length );
792+
791793 QSPI_CommandTypeDef st_command ;
792794 qspi_status_t status = qspi_prepare_command (command , & st_command );
793795 if (status != QSPI_STATUS_OK ) {
@@ -804,8 +806,6 @@ qspi_status_t qspi_write(qspi_t *obj, const qspi_command_t *command, const void
804806 }
805807 }
806808
807- debug_if (qspi_api_c_debug , "qspi_write size %u\n" , * length );
808-
809809 return status ;
810810}
811811#endif /* OCTOSPI */
@@ -823,11 +823,11 @@ qspi_status_t qspi_read(qspi_t *obj, const qspi_command_t *command, void *data,
823823 st_command .NbData = * length ;
824824
825825 if (HAL_OSPI_Command (& obj -> handle , & st_command , HAL_OSPI_TIMEOUT_DEFAULT_VALUE ) != HAL_OK ) {
826- debug_if ( qspi_api_c_debug , "HAL_OSPI_Command error\n " );
826+ tr_error ( "HAL_OSPI_Command error" );
827827 status = QSPI_STATUS_ERROR ;
828828 } else {
829829 if (HAL_OSPI_Receive (& obj -> handle , data , HAL_OSPI_TIMEOUT_DEFAULT_VALUE ) != HAL_OK ) {
830- debug_if ( qspi_api_c_debug , "HAL_OSPI_Receive error\n" );
830+ tr_error ( "HAL_OSPI_Receive error %d" , obj -> handle . ErrorCode );
831831 status = QSPI_STATUS_ERROR ;
832832 }
833833 }
@@ -865,7 +865,8 @@ qspi_status_t qspi_read(qspi_t *obj, const qspi_command_t *command, void *data,
865865#if defined(OCTOSPI1 )
866866qspi_status_t qspi_command_transfer (qspi_t * obj , const qspi_command_t * command , const void * tx_data , size_t tx_size , void * rx_data , size_t rx_size )
867867{
868- debug_if (qspi_api_c_debug , "qspi_command_transfer tx %u rx %u command %x\n" , tx_size , rx_size , command -> instruction .value );
868+ tr_info ("qspi_command_transfer tx %u rx %u command %#04x" , tx_size , rx_size , command -> instruction .value );
869+
869870 qspi_status_t status = QSPI_STATUS_OK ;
870871
871872 if ((tx_data == NULL || tx_size == 0 ) && (rx_data == NULL || rx_size == 0 )) {
@@ -880,7 +881,7 @@ qspi_status_t qspi_command_transfer(qspi_t *obj, const qspi_command_t *command,
880881 st_command .DataMode = HAL_OSPI_DATA_NONE ; /* Instruction only */
881882 if (HAL_OSPI_Command (& obj -> handle , & st_command , HAL_OSPI_TIMEOUT_DEFAULT_VALUE ) != HAL_OK ) {
882883 status = QSPI_STATUS_ERROR ;
883- debug_if ( qspi_api_c_debug , "HAL_OSPI_Command error\n " );
884+ tr_error ( "HAL_OSPI_Command error" );
884885 return status ;
885886 }
886887 } else {
@@ -889,23 +890,22 @@ qspi_status_t qspi_command_transfer(qspi_t *obj, const qspi_command_t *command,
889890 size_t tx_length = tx_size ;
890891 status = qspi_write (obj , command , tx_data , & tx_length );
891892 if (status != QSPI_STATUS_OK ) {
892- debug_if ( qspi_api_c_debug , "qspi_write error\n " );
893+ tr_error ( "qspi_write error" );
893894 return status ;
894895 }
895896 }
896897
897898 if (rx_data != NULL && rx_size ) {
898899 size_t rx_length = rx_size ;
899900 status = qspi_read (obj , command , rx_data , & rx_length );
900- // debug_if(qspi_api_c_debug, "qspi_read %d\n", status);
901901 }
902902 }
903903 return status ;
904904}
905905#else /* OCTOSPI */
906906qspi_status_t qspi_command_transfer (qspi_t * obj , const qspi_command_t * command , const void * tx_data , size_t tx_size , void * rx_data , size_t rx_size )
907907{
908- debug_if ( qspi_api_c_debug , "qspi_command_transfer tx %u rx %u command %x\n " , tx_size , rx_size , command -> instruction .value );
908+ tr_info ( "qspi_command_transfer tx %u rx %u command %#04x " , tx_size , rx_size , command -> instruction .value );
909909 qspi_status_t status = QSPI_STATUS_OK ;
910910
911911 if ((tx_data == NULL || tx_size == 0 ) && (rx_data == NULL || rx_size == 0 )) {
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