M487: Make SPIM CCM mode configurable

This is to support custom targets based on M480 series chips.

Author: ccli8

targets/TARGET_NUVOTON/TARGET_M480/device/system_M480.c

@@ -76,6 +76,7 @@ void SystemInit (void)
     /* Disable Flash Access Cycle Auto-tuning, set access cycle for CPU @ 192MHz */
     FMC->CYCCTL = FMC_CYCCTL_FADIS_Msk | (8 << FMC_CYCCTL_CYCLE_Pos);
 
+#if MBED_CONF_TARGET_SPIM_CCM_ENABLE
     // Divert SRAM bank2 (32 KB) to CCM from SPIM cache
     // NOTE: C-runtime not initialized yet. Ensure no static memory (global variable) are accessed in function below.
     // NOTE: SPIM must keep enabled to run CCM mode.
@@ -84,5 +85,6 @@ void SystemInit (void)
     SPIM_DISABLE_CACHE();
     SPIM_ENABLE_CCM();
     while (! SPIM_IS_CCM_EN());
+#endif
 }
 /*** (C) COPYRIGHT 2016 Nuvoton Technology Corp. ***/

targets/targets.json

@@ -12762,6 +12762,10 @@
             "IAR"
         ],
         "config": {
+            "spim-ccm-enable": {
+                "help": "Enable SPIM CCM mode to spare 32KiB SRAM for normal use",
+                "value": 0
+            },
             "gpio-irq-debounce-enable": {
                 "help": "Enable GPIO IRQ debounce",
                 "value": 0
@@ -12840,7 +12844,10 @@
         "device_name": "M487JIDAE",
         "detect_code": [
             "1304"
-        ]
+        ],
+        "overrides": {
+            "spim-ccm-enable": 1
+        }
     },
     "NUMAKER_IOT_M487": {
         "inherits": [
@@ -12852,7 +12859,10 @@
         "device_name": "M487JIDAE",
         "detect_code": [
             "1308"
-        ]
+        ],
+        "overrides": {
+            "spim-ccm-enable": 1
+        }
     },
     "TMPM066": {
         "inherits": [