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Merge pull request #11291 from LMESTM/STM32_OSPI_QSPI_fallback_support
Stm32 ospi qspi fallback support
2 parents 39733cb + bb1388b commit 940d3fd

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4 files changed

+120
-29
lines changed

4 files changed

+120
-29
lines changed

‎targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/TARGET_NUCLEO_L4R5ZI/PeripheralNames.h‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -83,6 +83,11 @@ typedef enum {
8383
CAN_1 = (int)CAN1_BASE
8484
} CANName;
8585

86+
typedef enum {
87+
QSPI_1 = (int)OCTOSPI1_R_BASE,
88+
QSPI_2 = (int)OCTOSPI2_R_BASE
89+
} QSPIName;
90+
8691
#ifdef __cplusplus
8792
}
8893
#endif

‎targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/TARGET_NUCLEO_L4R5ZI/PeripheralPins.c‎

Lines changed: 54 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -376,3 +376,57 @@ MBED_WEAK const PinMap PinMap_CAN_TD[] = {
376376
{PD_1, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
377377
{NC, NC, 0}
378378
};
379+
380+
//*** QUADSPI ***
381+
382+
MBED_WEAK const PinMap PinMap_QSPI_DATA0[] = {
383+
{PB_1, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0
384+
{PE_12, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0
385+
{PF_0, QSPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO0
386+
{PF_8, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0
387+
{NC, NC, 0}
388+
};
389+
390+
MBED_WEAK const PinMap PinMap_QSPI_DATA1[] = {
391+
{PB_0, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO1
392+
{PE_13, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO1
393+
{PF_1, QSPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO1
394+
{PF_9, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO1
395+
{NC, NC, 0}
396+
};
397+
398+
MBED_WEAK const PinMap PinMap_QSPI_DATA2[] = {
399+
{PA_7, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO2
400+
{PE_14, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO2
401+
{PF_2, QSPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO2
402+
{PF_7, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO2
403+
{NC, NC, 0}
404+
};
405+
406+
MBED_WEAK const PinMap PinMap_QSPI_DATA3[] = {
407+
{PA_6, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO3
408+
{PE_15, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO3
409+
{PF_3, QSPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO3
410+
{PF_6, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO3
411+
{NC, NC, 0}
412+
};
413+
414+
MBED_WEAK const PinMap PinMap_QSPI_SCLK[] = {
415+
{PA_3, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_CLK
416+
{PB_10, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_CLK
417+
{PE_10, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_CLK
418+
{PF_4, QSPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_OCTOSPIM_P2)}, // OCTOSPIM_P2_CLK
419+
{PF_10, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPIM_P1)}, // OCTOSPIM_P1_CLK
420+
{NC, NC, 0}
421+
};
422+
423+
MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = {
424+
{PA_2, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS
425+
{PA_4, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS
426+
{PB_11, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS
427+
{PC_11, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS
428+
{PD_3, QSPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P2)}, // OCTOSPIM_P2_NCS
429+
{PE_11, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS
430+
{PG_12, QSPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_OCTOSPIM_P2)}, // OCTOSPIM_P2_NCS
431+
{NC, NC, 0}
432+
};

‎targets/TARGET_STM/qspi_api.c‎

Lines changed: 39 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -50,24 +50,29 @@ void qspi_prepare_command(const qspi_command_t *command, OSPI_RegularCmdTypeDef
5050

5151
st_command->FlashId = HAL_OSPI_FLASH_ID_1;
5252

53-
switch (command->instruction.bus_width) {
54-
case QSPI_CFG_BUS_SINGLE:
55-
st_command->InstructionMode = HAL_OSPI_INSTRUCTION_1_LINE;
56-
break;
57-
case QSPI_CFG_BUS_DUAL:
58-
st_command->InstructionMode = HAL_OSPI_INSTRUCTION_2_LINES;
59-
break;
60-
case QSPI_CFG_BUS_QUAD:
61-
st_command->InstructionMode = HAL_OSPI_INSTRUCTION_4_LINES;
62-
break;
63-
default:
64-
st_command->InstructionMode = HAL_OSPI_INSTRUCTION_NONE;
65-
break;
53+
if (command->instruction.disabled == true) {
54+
st_command->InstructionMode = HAL_OSPI_INSTRUCTION_NONE;
55+
st_command->Instruction = 0;
56+
} else {
57+
st_command->Instruction = command->instruction.value;
58+
switch (command->instruction.bus_width) {
59+
case QSPI_CFG_BUS_SINGLE:
60+
st_command->InstructionMode = HAL_OSPI_INSTRUCTION_1_LINE;
61+
break;
62+
case QSPI_CFG_BUS_DUAL:
63+
st_command->InstructionMode = HAL_OSPI_INSTRUCTION_2_LINES;
64+
break;
65+
case QSPI_CFG_BUS_QUAD:
66+
st_command->InstructionMode = HAL_OSPI_INSTRUCTION_4_LINES;
67+
break;
68+
default:
69+
error("Command param error: wrong istruction format\n");
70+
break;
71+
}
6672
}
6773

6874
st_command->InstructionSize = HAL_OSPI_INSTRUCTION_8_BITS;
6975
st_command->InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_DISABLE;
70-
st_command->Instruction = command->instruction.value;
7176
st_command->DummyCycles = command->dummy_count;
7277
// these are target specific settings, use default values
7378
st_command->SIOOMode = HAL_OSPI_SIOO_INST_EVERY_CMD;
@@ -93,7 +98,7 @@ void qspi_prepare_command(const qspi_command_t *command, OSPI_RegularCmdTypeDef
9398
st_command->AddressMode = HAL_OSPI_ADDRESS_4_LINES;
9499
break;
95100
default:
96-
st_command->AddressMode = HAL_OSPI_ADDRESS_NONE;
101+
error("Command param error: wrong address size\n");
97102
break;
98103
}
99104
switch(command->address.size) {
@@ -110,7 +115,7 @@ void qspi_prepare_command(const qspi_command_t *command, OSPI_RegularCmdTypeDef
110115
st_command->AddressSize = HAL_OSPI_ADDRESS_32_BITS;
111116
break;
112117
default:
113-
printf("Command param error: wrong address size\n");
118+
error("Command param error: wrong address size\n");
114119
break;
115120
}
116121
}
@@ -284,7 +289,7 @@ qspi_status_t qspi_init(qspi_t *obj, PinName io0, PinName io1, PinName io2, PinN
284289
// Set default OCTOSPI handle values
285290
obj->handle.Init.DualQuad = HAL_OSPI_DUALQUAD_DISABLE;
286291
obj->handle.Init.MemoryType = HAL_OSPI_MEMTYPE_MICRON;
287-
obj->handle.Init.ClockPrescaler = 4;
292+
obj->handle.Init.ClockPrescaler = 4; // default value, will be overwritten in qspi_frequency
288293
obj->handle.Init.FifoThreshold = 4;
289294
obj->handle.Init.SampleShifting = HAL_OSPI_SAMPLE_SHIFTING_NONE;
290295
obj->handle.Init.DeviceSize = POSITION_VAL(QSPI_FLASH_SIZE_DEFAULT) - 1;
@@ -358,11 +363,23 @@ qspi_status_t qspi_init(qspi_t *obj, PinName io0, PinName io1, PinName io2, PinN
358363
obj->ssel = ssel;
359364
pinmap_pinout(ssel, PinMap_QSPI_SSEL);
360365

361-
OSPIM_Cfg_Struct.ClkPort = 2;
362-
OSPIM_Cfg_Struct.DQSPort = 2;
363-
OSPIM_Cfg_Struct.NCSPort = 2;
364-
OSPIM_Cfg_Struct.IOLowPort = HAL_OSPIM_IOPORT_2_LOW;
365-
OSPIM_Cfg_Struct.IOHighPort = HAL_OSPIM_IOPORT_2_HIGH;
366+
/* The OctoSPI IO Manager OCTOSPIM configuration is supported in a simplified mode in mbed-os
367+
* QSPI1 signals are mapped to port 1 and QSPI2 signals are mapped to port 2.
368+
* This is coded in this way in PeripheralPins.c */
369+
if(obj->qspi == QSPI_1) {
370+
OSPIM_Cfg_Struct.ClkPort = 1;
371+
OSPIM_Cfg_Struct.DQSPort = 1;
372+
OSPIM_Cfg_Struct.NCSPort = 1;
373+
OSPIM_Cfg_Struct.IOLowPort = HAL_OSPIM_IOPORT_1_LOW;
374+
OSPIM_Cfg_Struct.IOHighPort = HAL_OSPIM_IOPORT_1_HIGH;
375+
} else {
376+
OSPIM_Cfg_Struct.ClkPort = 2;
377+
OSPIM_Cfg_Struct.DQSPort = 2;
378+
OSPIM_Cfg_Struct.NCSPort = 2;
379+
OSPIM_Cfg_Struct.IOLowPort = HAL_OSPIM_IOPORT_2_LOW;
380+
OSPIM_Cfg_Struct.IOHighPort = HAL_OSPIM_IOPORT_2_HIGH;
381+
}
382+
366383
if (HAL_OSPIM_Config(&obj->handle, &OSPIM_Cfg_Struct, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
367384
{
368385
debug_if(qspi_api_c_debug, "HAL_OSPIM_Config error\n");

‎tools/targets/STM32_gen_PeripheralPins.py‎

Lines changed: 22 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,7 @@
11
"""
22
* mbed Microcontroller Library
33
* Copyright (c) 2006-2018 ARM Limited
4+
* Copyright (c) 2019 STMicroelectronics
45
*
56
* Licensed under the Apache License, Version 2.0 (the "License");
67
* you may not use this file except in compliance with the License.
@@ -26,7 +27,7 @@
2627
from xml.dom.minidom import parse, Node
2728
from argparse import RawTextHelpFormatter
2829

29-
GENPINMAP_VERSION = "1.5"
30+
GENPINMAP_VERSION = "1.7"
3031

3132
ADD_DEVICE_IF = 0
3233
ADD_QSPI_FEATURE = 1
@@ -79,6 +80,7 @@
7980
"NUCLEO_F446RE":"TIM5",
8081
"NUCLEO_F410RB":"TIM5",
8182
"NUCLEO_F429ZI":"TIM5",
83+
"STM32F427V(G-I)Tx":"TIM5",
8284
"NUCLEO_F446ZE":"TIM5",
8385
"NUCLEO_F412ZG":"TIM5",
8486
"NUCLEO_F413ZH":"TIM5",
@@ -99,6 +101,7 @@
99101
"NUCLEO_L4R5ZI":"TIM5",
100102
"NUCLEO_L4R5ZI_P":"TIM5",
101103

104+
"NUCLEO_WB55R":"TIM16",
102105
"DISCO_F051R8":"TIM1",
103106
"DISCO_F100RB":"TIM4",
104107
"DISCO_F303VC":"TIM2",
@@ -114,7 +117,8 @@
114117
"DISCO_L072CZ_LRWAN1":"TIM21",
115118
"DISCO_L475VG_IOT01A":"TIM5",
116119
"DISCO_L476VG":"TIM5",
117-
"DISCO_L496AG":"TIM5"
120+
"DISCO_L496AG":"TIM5",
121+
"DISCO_L4R9A":"TIM5"
118122
}
119123

120124

@@ -852,7 +856,10 @@ def print_qspi(l):
852856
CommentedLine = "//"
853857
s1 = "%-16s" % (CommentedLine + " {" + p[0] + ',')
854858
# p[2] : QUADSPI_BK1_IO3 / QUADSPI_CLK / QUADSPI_NCS
855-
s1 += "%-8s" % ('QSPI_1,')
859+
if "OCTOSPIM_P2" in p[2]:
860+
s1 += "%-8s" % ('QSPI_2,')
861+
else:
862+
s1 += "%-8s" % ('QSPI_1,')
856863
result = result.replace("GPIO_AF10_OTG_FS", "GPIO_AF10_QSPI")
857864
s1 += 'STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, ' + result +')},'
858865
s1 += ' // ' + p[2]
@@ -1001,13 +1008,13 @@ def parse_pins():
10011008
store_can(pin, name, sig)
10021009
if "ETH" in sig:
10031010
store_eth(pin, name, sig)
1004-
if "QUADSPI" in sig:
1011+
if "QUADSPI" in sig or "OCTOSPI" in sig:
10051012
store_qspi(pin, name, sig)
10061013
if "USB" in sig:
10071014
store_usb(pin, name, sig)
10081015
if "RCC_OSC" in sig:
10091016
store_osc(pin, name, sig)
1010-
if "SYS_" in sig:
1017+
if "SYS_" in sig or "PWR_" in sig or "DEBUG_" in sig:
10111018
store_sys(pin, name, sig)
10121019

10131020

@@ -1072,6 +1079,8 @@ def parse_BoardFile(fileName):
10721079
PinLabel[EachPin] = "STDIO_UART_RX"
10731080
else:
10741081
PinLabel[EachPin] = "STDIO_UART_TX"
1082+
elif "_RESERVED" in PinLabel[EachPin]:
1083+
PinLabel[EachPin] = "RESERVED_RADIO"
10751084
except:
10761085
pass
10771086

@@ -1225,16 +1234,22 @@ def parse_BoardFile(fileName):
12251234
TargetName += "DISCO_"
12261235
elif "Evaluation" in board_file_name:
12271236
TargetName += "EVAL_"
1228-
m = re.search(r'STM32([\w][\dR]{3}[\w]{0,2})[\w]*_Board', board_file_name)
1237+
m = re.search(r'STM32([\w]{1,2}[\dR]{3}[\w]{0,2})[\w]*_Board', board_file_name)
12291238
if m:
12301239
TargetName += "%s" % m.group(1)
12311240
# specific case
12321241
if "-P" in args.target:
12331242
TargetName += "_P"
1243+
1244+
if "H743ZI2" in board_file_name:
1245+
TargetName += "2"
1246+
12341247
if TargetName == "DISCO_L072C":
12351248
TargetName += "Z_LRWAN1"
1236-
if TargetName == "DISCO_L475V":
1249+
elif TargetName == "DISCO_L475V":
12371250
TargetName += "G_IOT01A"
1251+
elif TargetName == "DISCO_G071RBT":
1252+
TargetName = "DISCO_G071RB"
12381253
else:
12391254
quit()
12401255

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