|
1 | 1 | ================ Revision history ============================================ |
| 2 | +Gecko Platform 2.7.1.0 (32-bit MCU SDK 5.9.1.0) |
| 3 | + - No changes. |
| 4 | + |
| 5 | +Gecko Platform 2.7.0.0 (32-bit MCU SDK 5.9.0.0) |
| 6 | + * Added |
| 7 | + - MSC_MassErase() function is added for Series-2 devices. |
| 8 | + - Add remote frame support in EMLIB CAN. |
| 9 | + * Fixed |
| 10 | + - CHIP_Init() sets HFRCOEM23 clock as TRACECLK. |
| 11 | + - EMLIB IADC: The definition of `iadcNegInputGnd` has been modified |
| 12 | + to set PINNEG to 1. This prevents a polarity error when performing |
| 13 | + IADC conversions between supply pins and ground. |
| 14 | + - Fixed conversion of raw data in IADC_ConvertRawDataToResult(). |
| 15 | + - Fixed issue that could cause dcdcEm01LoadCurrent_mA, a parameter |
| 16 | + of EMU_DCDCOptimizeSlice(),to be used before value assignment. |
| 17 | + * Deprecated |
| 18 | + - Functions in em_msc are placed in flash for Series-0 and |
| 19 | + Series-1 devices, except for the EFM32G. MSC_WriteWordFast() |
| 20 | + function is deprecated. Calling the MSC_WriteWordFast() |
| 21 | + function will have the same effect as calling MSC_WriteWord(). |
| 22 | + |
| 23 | +Gecko Platform 2.6.1.0 (32-bit MCU SDK 5.8.1.0) |
| 24 | + * Added |
| 25 | + - The SE_OTPInit_t-struct has been expanded to include the options |
| 26 | + to apply narrow and full-page locks. The documentation of the |
| 27 | + existing struct-members has been improved. |
| 28 | + * Fixed |
| 29 | + - em_letimer: Previously, when calling LETIMER_Init() with |
| 30 | + comp0Top=true, the code would always write to the COMP0 or TOP |
| 31 | + register even if topValue was zero. This has now been changed |
| 32 | + so that the COMP0 or TOP register is written only if the |
| 33 | + topValue is != 0. This is to preserve backwards compatibility |
| 34 | + with applications that call LETIMER_CompareSet() before |
| 35 | + LETIMER_Init(). |
| 36 | + |
| 37 | +Gecko Platform 2.6.0.0 (32-bit MCU SDK 5.8.0.0) |
| 38 | + * Added |
| 39 | + - Added AES PCBC mode to em_crypto. |
| 40 | + - Added support for PLFRCO on EFR32xG13 Rev D devices using the |
| 41 | + em_cmu API. This oscillator is supported on some Rev D devices. |
| 42 | + Note that using PLFRCO on previous revisions will result in an |
| 43 | + assertion error, and code trying to enable this oscillator will |
| 44 | + block and not return. |
| 45 | + - Added support for LFRCO precision configuration for Series 2. |
| 46 | + - Added LETIMER_CounterGet() and LETIMER_CounterSet() functions to |
| 47 | + em_letimer. |
| 48 | + - Added TIMER_SyncWait() function to em_timer. |
| 49 | + * Changed |
| 50 | + - Added AES PCBC mode to em_crypto. |
| 51 | + - Added support for PLFRCO on EFR32xG13 Rev D devices using the |
| 52 | + em_cmu API. This oscillator is supported on some Rev D devices. |
| 53 | + Note that using PLFRCO on previous revisions will result in an |
| 54 | + assertion error, and code trying to enable this oscillator will |
| 55 | + block and not return. |
| 56 | + - Added support for LFRCO precision configuration for Series 2. |
| 57 | + - Added LETIMER_CounterGet() and LETIMER_CounterSet() functions to |
| 58 | + em_letimer. |
| 59 | + - Added TIMER_SyncWait() function to em_timer. |
| 60 | + * Fixed |
| 61 | + - Corrected GPIO port D pin count for EFR32xG13, EFR32xG14 and xGM13 |
| 62 | + devices. |
| 63 | + - In the license example for SLSTK3402A_EFM32PG12, reorder calls to |
| 64 | + ACMP_Init and ACMP_VASetup in order to avoid ACMP_Init overwriting |
| 65 | + registers set by ACMP_VASetup. |
| 66 | + - Fixed GPIO availability info in CMSIS device header files for |
| 67 | + Series 2. |
| 68 | + - Added a workaround for EFM32ZG and EFM32HG devices that deals with a |
| 69 | + problem reported in errata EMU_E107. (EMU_E107: An HF-IRQ received |
| 70 | + during EM2 or EM3 entry would cause the EMU to ignore the |
| 71 | + SLEEPDEEP-flag.) |
| 72 | + |
| 73 | +5.7.0 |
| 74 | + * Added |
| 75 | + - Added general support for EFM32GG12 and EFR32xG21. |
| 76 | + - emdbg: Added DBGDisableDebugAccess() for debug lock abstraction. |
| 77 | + - emcmu: Added CMUUSHFRCOFreqGet() function for getting current USHFRCO |
| 78 | + frequencyon Series 0 and 1. |
| 79 | + - empdm: New module supporting PDM (Pulse Density Modulation) peripheral. |
| 80 | + - emldma: Added PDM sinal and source selector, added new LDMA descriptor |
| 81 | + template for word(32bit) peripheral to memory tranfers. |
| 82 | + - emrtc: Added support for all 6 compare channels on Series 1. |
| 83 | + - emcmu: Added support for HFBUSPRESC in CMUClockPrescSet() and |
| 84 | + CMUClockPrescGet(). |
| 85 | + - emcmu: Added missing RTCC prescaled clock freq calculation. |
| 86 | + - emcmu: Added missing support for LETIMER1. |
| 87 | + - emadc: Added support for prescaler and timebase calculation in SYNC mode |
| 88 | + for HFPERCCLKdriven ADC. |
| 89 | + - Updated multiple modules to use correct HFPER clock tree (A, B or C) |
| 90 | + when calling CMUClockFreqGet()function. |
| 91 | + - emse: New module, contains API for interfacing with the Secure |
| 92 | + Element (SE) peripheral onSeries 2. Module contains functions to get |
| 93 | + status information from the SE, interact with debuglocks, and write |
| 94 | + keys and user data. The module is also used by mbed TLS when performing |
| 95 | + accelerated crypto operations. |
| 96 | + * Changed |
| 97 | + - emcmu: CMUOscillatorEnable() will wait for the RDY flag to go low when |
| 98 | + enable is false andwait is true for Series 1. |
| 99 | + - emcmu: CMULFXOInit() will now check if configuration is necessary before |
| 100 | + disabling the LFXO. On a soft reset, the LFXO might already be ready for |
| 101 | + use with correct tuning values. |
| 102 | + - emcmu: CMUHFXOInit() now returns early if HFXO is already selected |
| 103 | + as SYSCLK. |
| 104 | + - emcmu: Updated max frequency for WS2/1.0V scaling according to latest |
| 105 | + datasheets. |
| 106 | + * Fixed |
| 107 | + - emwdog: Changing default oscillator for the watchdog from 1 kHz ULFRCO |
| 108 | + to the 32.768 kHzLFRCO. This change is inside WDOGINITDEFAULT. Make sure |
| 109 | + we wait for previous opera-tions to complete before applying any new |
| 110 | + configurations to work correctly with the asynchronousperipheral. |
| 111 | + - Adding a timeout so operations started when SYNCBUSY stays high will |
| 112 | + complete. |
| 113 | + - emmsc: Unlock the MSC before write/erase operations and return to the |
| 114 | + previous state beforethe function returns. |
| 115 | + - emadc: GPBIASACC is set to LOWACC when reading the internal temperature |
| 116 | + sensor for Series2. |
| 117 | + - emcmu: Fixed bug where HFRCODIV2 remains selected for certain |
| 118 | + configurations after theDPLL is initialized. |
| 119 | + * Removed |
| 120 | + - emcmu: Removed CMUHFCLKLEPRESCREG case from switch statement inside the |
| 121 | + functionCMUClockPrescSet(). This switch case is unnecessary since |
| 122 | + HFCLKLE prescaler is automaticallyset when the HF clock is changed. |
| 123 | + |
| 124 | +5.6.0 |
| 125 | + * Added |
| 126 | + - EMLIB targets CMSIS version 5.3.0. |
| 127 | + - MSC write and erase functions return an error code when the MSC register |
| 128 | + interface is locked. |
| 129 | + - Added initialization of HYSTERESIS0 and HYSTERESIS1 in ACMPInit() for |
| 130 | + series-1 devices. |
| 131 | + - Added function to route PRS output to GPIO pins for Series 0 and 1 |
| 132 | + - Added missing argument to CRYPTOInstructionSequenceExecute() inside |
| 133 | + the CRYPTOEXECUTE20macro. |
| 134 | + - Added support for setting and getting the LETIMER top value using the |
| 135 | + new LETIMERTopGet()and LETIMERTopSet() functions. |
| 136 | + - Added new member to the LETIMERInitTypeDef struct called topValue. This |
| 137 | + value can beused to initialize the top value when using the LETIMER. |
| 138 | + - Added const to CMUDPLLLock() argument and added new default initializer. |
| 139 | + - Added handling of CLKIN and HFRCODIV2 in CMU. |
| 140 | + - Added support for all 23 PRS channels for EFM32GG11. |
| 141 | + - Added full EBI support for EFM32GG11. |
| 142 | + * Changed |
| 143 | + - Disable WREN in the MSCMassErase() function before returning. |
| 144 | + - Added missing call to CMUOscillatorEnable() when HFXO AutoStart is used. |
| 145 | + - WDOGnInit() will only wait for synchronization if the peripheral is |
| 146 | + already enabled. |
| 147 | + - When an instruction fetch results in a bus fault (e.g. from an external |
| 148 | + device), the bus fault ispropagated to the core, but at the same time, |
| 149 | + the data may be cached. This means that nexttime this instruction |
| 150 | + is fetched, the core may get invalid data, but without any bus fault. |
| 151 | + ICacheis now flushed at the event of a bus fault to work around this |
| 152 | + issue. |
| 153 | + - Fixed PCNTnCNTSIZE for multiple families. |
| 154 | + |
| 155 | +5.5.0 |
| 156 | + * Added |
| 157 | + - Added support additional HFPERCLK trees on EFM32 Giant Gecko 11. |
| 158 | + - Added autoCsEnable parameter to USARInitSyncTypeDef and |
| 159 | + USARTInitAsyncTypeDef forseries 0 parts. |
| 160 | + - Added EMURamPowerUp() function for series 1 devices to power up all |
| 161 | + SRAM blocks. |
| 162 | + - Adding restoring of HFRCO frequency when calling EMUEnterEM2(true) |
| 163 | + and voltage scaling isenable in EM2/EM3. |
| 164 | + - Added support for opamp OPA3. |
| 165 | + * Fixed |
| 166 | + - Fixed issue where TX data could be lost when calling |
| 167 | + LEUARTTxDmaInEM2Enable() whentransmitter is enabled and sending data. |
| 168 | + - Added support for unaligned data in CRYPTO AES functions. |
| 169 | + - In ADC asynchronous clock mode, assert on ADC clock frequency less or |
| 170 | + equal to 2/3 of theHFPER clock frequency. |
| 171 | + - In ADCInit(), set ADC clock mode for correct ADC instance. |
| 172 | + - Change behavior of GPIOEM4SetPinRetention() so it does not overwrite |
| 173 | + GPIO retention configwhen SWUNLATCH is already set. |
| 174 | + - Check RSTEN before waiting for register synchronization in BURTC module. |
| 175 | + - Fixed bug with wait-state handling when low-voltage mode is used in |
| 176 | + EM2/EM3. This was fixedby enabling automatic hardware handling of |
| 177 | + wait-states. |
| 178 | + - Changed minimum ’N’ requirement in CMUDPLLLock() from 32 to greater |
| 179 | + than 300. |
| 180 | + - Added support for USBLE clock in CMUClockFreqGet(). |
| 181 | + * Removed |
| 182 | + - Removed support for PLFRCO in CMU. |
| 183 | + |
| 184 | +5.4.0 |
| 185 | + * Added |
| 186 | + - Added support for LCD dynamic charge distribution (low power feature). |
| 187 | + - Added support for ECC memory initialization using the function |
| 188 | + MSCEccConfigSet(). |
| 189 | + * Fixed |
| 190 | + - Fixed bug in assert statement in COREInitNvicVectorTable(). |
| 191 | + - Fixed hardware bug when switching to EM4S when powering analog peripherals |
| 192 | + from DVDD. This bugfix is active for EFM32GG11 and EFM32TG11. |
| 193 | + - Ensure that RX/TX is disabled when configuring RX/TX DMA wakeup. |
| 194 | + - Fixed bug with wait state handling when MSC is locked. |
| 195 | + - Renamed ACMPCTRLPWRSELVREGVDD to ACMPCTRLPWRSELDVDD. |
| 196 | + |
2 | 197 | 5.3.3 |
3 | 198 | - em_cmu: 48 MHz HFRCO band selectable for devices that support it. |
4 | 199 | - em_emu: Added macro guards for BU mode functionality for series 0 devices. |
|
0 commit comments