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Merge pull request #12404 from OpenNuvoton/nuvoton_m2351_bsp
M2351: Update BSP and bugfix
2 parents bb86c0e + 3d9c7b2 commit 8e52205

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129 files changed

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‎targets/TARGET_NUVOTON/TARGET_M2351/PeripheralNames.h‎

Lines changed: 79 additions & 69 deletions
Original file line numberDiff line numberDiff line change
@@ -38,7 +38,7 @@ extern "C" {
3838

3939
#if 0
4040
typedef enum {
41-
41+
4242
#if defined(SCU_INIT_IONSSET_VAL) && (SCU_INIT_IONSSET_VAL & (1 << 0))
4343
GPIO_A = (int) NU_MODNAME(GPIOA_BASE + NS_OFFSET, 0, 0),
4444
#else
@@ -76,143 +76,152 @@ typedef enum {
7676
#endif
7777

7878
#if defined(SCU_INIT_IONSSET_VAL) && (SCU_INIT_IONSSET_VAL & (1 << 6))
79-
GPIO_G = (int) NU_MODNAME(GPIOF_BASE + NS_OFFSET, 6, 0)
79+
GPIO_G = (int) NU_MODNAME(GPIOG_BASE + NS_OFFSET, 6, 0),
80+
#else
81+
GPIO_G = (int) NU_MODNAME(GPIOG_BASE, 6, 0),
82+
#endif
83+
84+
#if defined(SCU_INIT_IONSSET_VAL) && (SCU_INIT_IONSSET_VAL & (1 << 7))
85+
GPIO_H = (int) NU_MODNAME(GPIOH_BASE + NS_OFFSET, 7, 0),
8086
#else
81-
GPIO_G = (int) NU_MODNAME(GPIOF_BASE, 6, 0)
87+
GPIO_H = (int) NU_MODNAME(GPIOH_BASE, 7, 0),
8288
#endif
8389

8490
} GPIOName;
8591
#endif
8692

8793
typedef enum {
88-
94+
8995
#if defined(SCU_INIT_PNSSET2_VAL) && (SCU_INIT_PNSSET2_VAL & (1 << 3))
90-
ADC_0_0 = (int) NU_MODNAME(EADC0_BASE + NS_OFFSET, 0, 0),
91-
ADC_0_1 = (int) NU_MODNAME(EADC0_BASE + NS_OFFSET, 0, 1),
92-
ADC_0_2 = (int) NU_MODNAME(EADC0_BASE + NS_OFFSET, 0, 2),
93-
ADC_0_3 = (int) NU_MODNAME(EADC0_BASE + NS_OFFSET, 0, 3),
94-
ADC_0_4 = (int) NU_MODNAME(EADC0_BASE + NS_OFFSET, 0, 4),
95-
ADC_0_5 = (int) NU_MODNAME(EADC0_BASE + NS_OFFSET, 0, 5),
96-
ADC_0_6 = (int) NU_MODNAME(EADC0_BASE + NS_OFFSET, 0, 6),
97-
ADC_0_7 = (int) NU_MODNAME(EADC0_BASE + NS_OFFSET, 0, 7),
98-
ADC_0_8 = (int) NU_MODNAME(EADC0_BASE + NS_OFFSET, 0, 8),
99-
ADC_0_9 = (int) NU_MODNAME(EADC0_BASE + NS_OFFSET, 0, 9),
100-
ADC_0_10 = (int) NU_MODNAME(EADC0_BASE + NS_OFFSET, 0, 10),
101-
ADC_0_11 = (int) NU_MODNAME(EADC0_BASE + NS_OFFSET, 0, 11),
102-
ADC_0_12 = (int) NU_MODNAME(EADC0_BASE + NS_OFFSET, 0, 12),
103-
ADC_0_13 = (int) NU_MODNAME(EADC0_BASE + NS_OFFSET, 0, 13),
104-
ADC_0_14 = (int) NU_MODNAME(EADC0_BASE + NS_OFFSET, 0, 14),
105-
ADC_0_15 = (int) NU_MODNAME(EADC0_BASE + NS_OFFSET, 0, 15)
106-
#else
107-
ADC_0_0 = (int) NU_MODNAME(EADC0_BASE, 0, 0),
108-
ADC_0_1 = (int) NU_MODNAME(EADC0_BASE, 0, 1),
109-
ADC_0_2 = (int) NU_MODNAME(EADC0_BASE, 0, 2),
110-
ADC_0_3 = (int) NU_MODNAME(EADC0_BASE, 0, 3),
111-
ADC_0_4 = (int) NU_MODNAME(EADC0_BASE, 0, 4),
112-
ADC_0_5 = (int) NU_MODNAME(EADC0_BASE, 0, 5),
113-
ADC_0_6 = (int) NU_MODNAME(EADC0_BASE, 0, 6),
114-
ADC_0_7 = (int) NU_MODNAME(EADC0_BASE, 0, 7),
115-
ADC_0_8 = (int) NU_MODNAME(EADC0_BASE, 0, 8),
116-
ADC_0_9 = (int) NU_MODNAME(EADC0_BASE, 0, 9),
117-
ADC_0_10 = (int) NU_MODNAME(EADC0_BASE, 0, 10),
118-
ADC_0_11 = (int) NU_MODNAME(EADC0_BASE, 0, 11),
119-
ADC_0_12 = (int) NU_MODNAME(EADC0_BASE, 0, 12),
120-
ADC_0_13 = (int) NU_MODNAME(EADC0_BASE, 0, 13),
121-
ADC_0_14 = (int) NU_MODNAME(EADC0_BASE, 0, 14),
122-
ADC_0_15 = (int) NU_MODNAME(EADC0_BASE, 0, 15)
96+
ADC_0_0 = (int) NU_MODNAME(EADC_BASE + NS_OFFSET, 0, 0),
97+
ADC_0_1 = (int) NU_MODNAME(EADC_BASE + NS_OFFSET, 0, 1),
98+
ADC_0_2 = (int) NU_MODNAME(EADC_BASE + NS_OFFSET, 0, 2),
99+
ADC_0_3 = (int) NU_MODNAME(EADC_BASE + NS_OFFSET, 0, 3),
100+
ADC_0_4 = (int) NU_MODNAME(EADC_BASE + NS_OFFSET, 0, 4),
101+
ADC_0_5 = (int) NU_MODNAME(EADC_BASE + NS_OFFSET, 0, 5),
102+
ADC_0_6 = (int) NU_MODNAME(EADC_BASE + NS_OFFSET, 0, 6),
103+
ADC_0_7 = (int) NU_MODNAME(EADC_BASE + NS_OFFSET, 0, 7),
104+
ADC_0_8 = (int) NU_MODNAME(EADC_BASE + NS_OFFSET, 0, 8),
105+
ADC_0_9 = (int) NU_MODNAME(EADC_BASE + NS_OFFSET, 0, 9),
106+
ADC_0_10 = (int) NU_MODNAME(EADC_BASE + NS_OFFSET, 0, 10),
107+
ADC_0_11 = (int) NU_MODNAME(EADC_BASE + NS_OFFSET, 0, 11),
108+
ADC_0_12 = (int) NU_MODNAME(EADC_BASE + NS_OFFSET, 0, 12),
109+
ADC_0_13 = (int) NU_MODNAME(EADC_BASE + NS_OFFSET, 0, 13),
110+
ADC_0_14 = (int) NU_MODNAME(EADC_BASE + NS_OFFSET, 0, 14),
111+
ADC_0_15 = (int) NU_MODNAME(EADC_BASE + NS_OFFSET, 0, 15),
112+
#else
113+
ADC_0_0 = (int) NU_MODNAME(EADC_BASE, 0, 0),
114+
ADC_0_1 = (int) NU_MODNAME(EADC_BASE, 0, 1),
115+
ADC_0_2 = (int) NU_MODNAME(EADC_BASE, 0, 2),
116+
ADC_0_3 = (int) NU_MODNAME(EADC_BASE, 0, 3),
117+
ADC_0_4 = (int) NU_MODNAME(EADC_BASE, 0, 4),
118+
ADC_0_5 = (int) NU_MODNAME(EADC_BASE, 0, 5),
119+
ADC_0_6 = (int) NU_MODNAME(EADC_BASE, 0, 6),
120+
ADC_0_7 = (int) NU_MODNAME(EADC_BASE, 0, 7),
121+
ADC_0_8 = (int) NU_MODNAME(EADC_BASE, 0, 8),
122+
ADC_0_9 = (int) NU_MODNAME(EADC_BASE, 0, 9),
123+
ADC_0_10 = (int) NU_MODNAME(EADC_BASE, 0, 10),
124+
ADC_0_11 = (int) NU_MODNAME(EADC_BASE, 0, 11),
125+
ADC_0_12 = (int) NU_MODNAME(EADC_BASE, 0, 12),
126+
ADC_0_13 = (int) NU_MODNAME(EADC_BASE, 0, 13),
127+
ADC_0_14 = (int) NU_MODNAME(EADC_BASE, 0, 14),
128+
ADC_0_15 = (int) NU_MODNAME(EADC_BASE, 0, 15),
123129
#endif
124130

125131
} ADCName;
126132

127133
typedef enum {
134+
128135
#if defined(SCU_INIT_PNSSET2_VAL) && (SCU_INIT_PNSSET2_VAL & (1 << 7))
129136
DAC_0_0 = (int) NU_MODNAME(DAC0_BASE + NS_OFFSET, 0, 0),
130-
DAC_1_0 = (int) NU_MODNAME(DAC1_BASE + NS_OFFSET, 1, 0)
137+
DAC_1_0 = (int) NU_MODNAME(DAC1_BASE + NS_OFFSET, 1, 0),
131138
#else
132139
DAC_0_0 = (int) NU_MODNAME(DAC0_BASE, 0, 0),
133-
DAC_1_0 = (int) NU_MODNAME(DAC1_BASE, 1, 0)
140+
DAC_1_0 = (int) NU_MODNAME(DAC1_BASE, 1, 0),
134141
#endif
142+
135143
} DACName;
136144

137145
typedef enum {
138146

139-
#if defined(SCU_INIT_PNSSET3_VAL) && (SCU_INIT_PNSSET3_VAL & (1<<16))
147+
#if defined(SCU_INIT_PNSSET3_VAL) && (SCU_INIT_PNSSET3_VAL & (1 << 16))
140148
UART_0 = (int) NU_MODNAME(UART0_BASE + NS_OFFSET, 0, 0),
141149
#else
142150
UART_0 = (int) NU_MODNAME(UART0_BASE, 0, 0),
143151
#endif
144152

145-
#if defined(SCU_INIT_PNSSET3_VAL) && (SCU_INIT_PNSSET3_VAL & (1<<17))
153+
#if defined(SCU_INIT_PNSSET3_VAL) && (SCU_INIT_PNSSET3_VAL & (1 << 17))
146154
UART_1 = (int) NU_MODNAME(UART1_BASE + NS_OFFSET, 1, 0),
147155
#else
148156
UART_1 = (int) NU_MODNAME(UART1_BASE, 1, 0),
149157
#endif
150158

151-
#if defined(SCU_INIT_PNSSET3_VAL) && (SCU_INIT_PNSSET3_VAL & (1<<18))
159+
#if defined(SCU_INIT_PNSSET3_VAL) && (SCU_INIT_PNSSET3_VAL & (1 << 18))
152160
UART_2 = (int) NU_MODNAME(UART2_BASE + NS_OFFSET, 2, 0),
153161
#else
154162
UART_2 = (int) NU_MODNAME(UART2_BASE, 2, 0),
155163
#endif
156164

157-
#if defined(SCU_INIT_PNSSET3_VAL) && (SCU_INIT_PNSSET3_VAL & (0x01<<19))
165+
#if defined(SCU_INIT_PNSSET3_VAL) && (SCU_INIT_PNSSET3_VAL & (1 << 19))
158166
UART_3 = (int) NU_MODNAME(UART3_BASE + NS_OFFSET, 3, 0),
159167
#else
160168
UART_3 = (int) NU_MODNAME(UART3_BASE, 3, 0),
161169
#endif
162170

163-
#if defined(SCU_INIT_PNSSET3_VAL) && (SCU_INIT_PNSSET3_VAL & (0x01<<20))
171+
#if defined(SCU_INIT_PNSSET3_VAL) && (SCU_INIT_PNSSET3_VAL & (1 << 20))
164172
UART_4 = (int) NU_MODNAME(UART4_BASE + NS_OFFSET, 4, 0),
165173
#else
166174
UART_4 = (int) NU_MODNAME(UART4_BASE, 4, 0),
167175
#endif
168176

169-
#if defined(SCU_INIT_PNSSET3_VAL) && (SCU_INIT_PNSSET3_VAL & (0x01<<21))
177+
#if defined(SCU_INIT_PNSSET3_VAL) && (SCU_INIT_PNSSET3_VAL & (1 << 21))
170178
UART_5 = (int) NU_MODNAME(UART5_BASE + NS_OFFSET, 5, 0),
171179
#else
172180
UART_5 = (int) NU_MODNAME(UART5_BASE, 5, 0),
173181
#endif
174182

175183
// NOTE: board-specific
176-
STDIO_UART = UART_0
184+
STDIO_UART = UART_0,
177185

178186
} UARTName;
179187

180188
typedef enum {
181189

182-
#if defined(SCU_INIT_PNSSET3_VAL) && (SCU_INIT_PNSSET3_VAL & (1 << 0))
190+
#if defined(SCU_INIT_PNSSET3_VAL) && (SCU_INIT_PNSSET3_VAL & (1 << 1))
183191
SPI_0 = (int) NU_MODNAME(SPI0_BASE + NS_OFFSET, 0, 0),
184192
#else
185193
SPI_0 = (int) NU_MODNAME(SPI0_BASE, 0, 0),
186194
#endif
187195

188-
#if defined(SCU_INIT_PNSSET3_VAL) && (SCU_INIT_PNSSET3_VAL & (1 << 1))
196+
#if defined(SCU_INIT_PNSSET3_VAL) && (SCU_INIT_PNSSET3_VAL & (1 << 2))
189197
SPI_1 = (int) NU_MODNAME(SPI1_BASE + NS_OFFSET, 1, 0),
190198
#else
191199
SPI_1 = (int) NU_MODNAME(SPI1_BASE, 1, 0),
192200
#endif
193201

194-
#if defined(SCU_INIT_PNSSET3_VAL) && (SCU_INIT_PNSSET3_VAL & (1 << 2))
202+
#if defined(SCU_INIT_PNSSET3_VAL) && (SCU_INIT_PNSSET3_VAL & (1 << 3))
195203
SPI_2 = (int) NU_MODNAME(SPI2_BASE + NS_OFFSET, 2, 0),
196204
#else
197205
SPI_2 = (int) NU_MODNAME(SPI2_BASE, 2, 0),
198206
#endif
199207

200-
#if defined(SCU_INIT_PNSSET3_VAL) && (SCU_INIT_PNSSET3_VAL & (1 << 3))
208+
#if defined(SCU_INIT_PNSSET3_VAL) && (SCU_INIT_PNSSET3_VAL & (1 << 4))
201209
SPI_3 = (int) NU_MODNAME(SPI3_BASE + NS_OFFSET, 3, 0),
202210
#else
203211
SPI_3 = (int) NU_MODNAME(SPI3_BASE, 3, 0),
204212
#endif
205213

206-
#if defined(SCU_INIT_PNSSET3_VAL) && (SCU_INIT_PNSSET3_VAL & (1 << 5))
207-
SPI_5 = (int) NU_MODNAME(SPI5_BASE + NS_OFFSET, 5, 0)
214+
/* No SPI4 H/W, degrade QSPI0 H/W to SPI_4 for standard SPI usage */
215+
#if defined(SCU_INIT_PNSSET3_VAL) && (SCU_INIT_PNSSET3_VAL & (1 << 0))
216+
SPI_4 = (int) NU_MODNAME(QSPI0_BASE + NS_OFFSET, 4, 0),
208217
#else
209-
SPI_5 = (int) NU_MODNAME(SPI5_BASE, 5, 0)
218+
SPI_4 = (int) NU_MODNAME(QSPI0_BASE, 4, 0),
210219
#endif
211220

212221
} SPIName;
213222

214223
typedef enum {
215-
224+
216225
#if defined(SCU_INIT_PNSSET4_VAL) && (SCU_INIT_PNSSET4_VAL & (1 << 0))
217226
I2C_0 = (int) NU_MODNAME(I2C0_BASE + NS_OFFSET, 0, 0),
218227
#else
@@ -226,9 +235,9 @@ typedef enum {
226235
#endif
227236

228237
#if defined(SCU_INIT_PNSSET4_VAL) && (SCU_INIT_PNSSET4_VAL & (1 << 2))
229-
I2C_2 = (int) NU_MODNAME(I2C2_BASE + NS_OFFSET, 2, 0)
238+
I2C_2 = (int) NU_MODNAME(I2C2_BASE + NS_OFFSET, 2, 0),
230239
#else
231-
I2C_2 = (int) NU_MODNAME(I2C2_BASE, 2, 0)
240+
I2C_2 = (int) NU_MODNAME(I2C2_BASE, 2, 0),
232241
#endif
233242

234243
} I2CName;
@@ -274,7 +283,7 @@ typedef enum {
274283
/* TMR0/1 are hard-wired to Secure mode */
275284
TIMER_0 = (int) NU_MODNAME(TMR01_BASE, 0, 0),
276285
TIMER_1 = (int) NU_MODNAME(TMR01_BASE + 0x100, 1, 0),
277-
286+
278287
#if defined(SCU_INIT_PNSSET2_VAL) && (SCU_INIT_PNSSET2_VAL & (1 << 17))
279288
TIMER_2 = (int) NU_MODNAME(TMR23_BASE + NS_OFFSET, 2, 0),
280289
TIMER_3 = (int) NU_MODNAME(TMR23_BASE + NS_OFFSET + 0x100, 3, 0),
@@ -286,11 +295,11 @@ typedef enum {
286295
} TIMERName;
287296

288297
typedef enum {
289-
298+
290299
#if defined(SCU_INIT_PNSSET2_VAL) && (SCU_INIT_PNSSET2_VAL & (1 << 1))
291-
RTC_0 = (int) NU_MODNAME(RTC_BASE + NS_OFFSET, 0, 0)
300+
RTC_0 = (int) NU_MODNAME(RTC_BASE + NS_OFFSET, 0, 0),
292301
#else
293-
RTC_0 = (int) NU_MODNAME(RTC_BASE, 0, 0)
302+
RTC_0 = (int) NU_MODNAME(RTC_BASE, 0, 0),
294303
#endif
295304

296305
} RTCName;
@@ -301,38 +310,39 @@ typedef enum {
301310
DMA_0 = (int) NU_MODNAME(PDMA0_BASE, 0, 0),
302311

303312
#if defined(SCU_INIT_PNSSET0_VAL) && (SCU_INIT_PNSSET0_VAL & (1 << 24))
304-
DMA_1 = (int) NU_MODNAME(PDMA1_BASE + NS_OFFSET, 1, 0)
313+
DMA_1 = (int) NU_MODNAME(PDMA1_BASE + NS_OFFSET, 1, 0),
305314
#else
306-
DMA_1 = (int) NU_MODNAME(PDMA1_BASE, 1, 0)
315+
DMA_1 = (int) NU_MODNAME(PDMA1_BASE, 1, 0),
307316
#endif
308317

309318
} DMAName;
310319

311320
typedef enum {
312321

313322
#if defined(SCU_INIT_PNSSET0_VAL) && (SCU_INIT_PNSSET0_VAL & (1 << 13))
314-
SD_0 = (int) NU_MODNAME(SDH0_BASE + NS_OFFSET, 0, 0)
323+
SD_0 = (int) NU_MODNAME(SDH0_BASE + NS_OFFSET, 0, 0),
315324
#else
316-
SD_0 = (int) NU_MODNAME(SDH0_BASE, 0, 0)
325+
SD_0 = (int) NU_MODNAME(SDH0_BASE, 0, 0),
317326
#endif
318327

319328
} SDName;
320329

321330
typedef enum {
322-
331+
323332
#if defined(SCU_INIT_PNSSET5_VAL) && (SCU_INIT_PNSSET5_VAL & (1 << 0))
324-
CAN_0 = (int) NU_MODNAME(CAN0_BASE + NS_OFFSET, 0, 0)
333+
CAN_0 = (int) NU_MODNAME(CAN0_BASE + NS_OFFSET, 0, 0),
325334
#else
326-
CAN_0 = (int) NU_MODNAME(CAN0_BASE, 0, 0)
335+
CAN_0 = (int) NU_MODNAME(CAN0_BASE, 0, 0),
327336
#endif
328337

329338
} CANName;
330339

331340
typedef enum {
341+
332342
#if defined(SCU_INIT_PNSSET5_VAL) && (SCU_INIT_PNSSET5_VAL & (1 << 25))
333-
TRNG_0 = (int) NU_MODNAME(TRNG_BASE + NS_OFFSET, 0, 0)
343+
TRNG_0 = (int) NU_MODNAME(TRNG_BASE + NS_OFFSET, 0, 0),
334344
#else
335-
TRNG_0 = (int) NU_MODNAME(TRNG_BASE, 0, 0)
345+
TRNG_0 = (int) NU_MODNAME(TRNG_BASE, 0, 0),
336346
#endif
337347

338348
} TRNGName;

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