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Commit 84d9e62

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author
Arto Kinnunen
committed
802.15.4 STM S2LP driver update
Sync with master v1.0.5
1 parent 599ddce commit 84d9e62

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4 files changed

+175
-87
lines changed

4 files changed

+175
-87
lines changed

‎components/802.15.4_RF/stm-s2lp-rf-driver/mbed_lib.json‎

Lines changed: 64 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,14 +1,73 @@
11
{
22
"name": "s2lp",
33
"config": {
4+
"SPI_SDI": {
5+
"help": "SPI_SDI pin for SPI connection. D11 assumed, needs to be set/overwritten otherwise",
6+
"value": null
7+
},
8+
"SPI_SDO": {
9+
"help": "SPI_SDO pin for SPI connection. D12 assumed, needs to be set/overwritten otherwise",
10+
"value": null
11+
},
12+
"SPI_SCLK": {
13+
"help": "SPI_SCLK pin for SPI connection, D13 assumed, needs to be set/overwritten otherwise",
14+
"value": null
15+
},
16+
"SPI_CS": {
17+
"help": "SPI_CS pin for SPI connection, A1 assumed, needs to be set/overwritten otherwise",
18+
"value": null
19+
},
20+
"SPI_SDN": {
21+
"help": "SPI_SDN pin for SPI connection, D7 assumed, needs to be set/overwritten otherwise",
22+
"value": null
23+
},
24+
"TEST_PIN_TX": {
25+
"help": "TEST_PIN_TX pin for serial connection, D6 assumed, needs to be set/overwritten otherwise",
26+
"value": null
27+
},
28+
"TEST_PIN_RX": {
29+
"help": "TEST_PIN_RX pin for serial connection, D5 assumed, needs to be set/overwritten otherwise",
30+
"value": null
31+
},
32+
"TEST_PIN_CSMA": {
33+
"help": "TEST_PIN_CSMA pin for CSMA, D4 assumed, needs to be set/overwritten otherwise",
34+
"value": null
35+
},
36+
"TEST_PIN_SPARE_1": {
37+
"help": "TEST_PIN_SPARE_1 pin for testing, D2 assumed, needs to be set/overwritten otherwise",
38+
"value": null
39+
},
40+
"TEST_PIN_SPARE_2": {
41+
"help": "TEST_PIN_SPARE_2 pin for testing, D8 assumed, needs to be set/overwritten otherwise",
42+
"value": null
43+
},
44+
"SPI_GPIO0": {
45+
"help": "SPI_GPIO0 pin for GPIO testing, A0 assumed, needs to be set/overwritten otherwise",
46+
"value": null
47+
},
48+
"SPI_GPIO1": {
49+
"help": "SPI_GPIO1 pin for GPIO testing, A2 assumed, needs to be set/overwritten otherwise",
50+
"value": null
51+
},
52+
"SPI_GPIO2": {
53+
"help": "SPI_GPIO2 pin for GPIO testing, A3 assumed, needs to be set/overwritten otherwise",
54+
"value": null
55+
},
56+
"SPI_GPIO3": {
57+
"help": "SPI_GPIO3 pin for GPIO testing, A5 assumed, needs to be set/overwritten otherwise",
58+
"value": null
59+
},
60+
"I2C_SDA": {
61+
"help": "I2C_SDA pin for I2C SDA, null assumed, needs to be set/overwritten otherwise",
62+
"value": null
63+
},
64+
"I2C_SCL": {
65+
"help": "I2C_SCL pin for I2C SCL, null assumed, needs to be set/overwritten otherwise",
66+
"value": null
67+
},
468
"provide-default": {
569
"help": "Provide default NanostackRfpy. [true/false]",
670
"value": false
7-
},
8-
"target_overrides": {
9-
"MTB_STM_S2LP": {
10-
"s2lp.provide-default": true
11-
}
1271
}
1372
}
1473
}

‎components/802.15.4_RF/stm-s2lp-rf-driver/source/NanostackRfPhys2lp.cpp‎

Lines changed: 29 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -182,7 +182,9 @@ static bool rf_rx_filter(uint8_t *mac_header, uint8_t *mac_64bit_addr, uint8_t *
182182
static void rf_cca_timer_start(uint32_t slots);
183183

184184
static RFPins *rf;
185+
#ifdef TEST_GPIOS_ENABLED
185186
static TestPins_S2LP *test_pins;
187+
#endif
186188
static phy_device_driver_s device_driver;
187189
static int8_t rf_radio_driver_id = -1;
188190
static uint8_t *tx_data_ptr;
@@ -207,6 +209,7 @@ static uint8_t s2lp_short_address[2];
207209
static uint8_t s2lp_MAC[8];
208210
static rf_mode_e rf_mode = RF_MODE_NORMAL;
209211
static bool rf_update_config = false;
212+
static bool rf_update_cca_threshold = false;
210213
static uint16_t cur_packet_len = 0xffff;
211214
static uint32_t receiver_ready_timestamp;
212215
static int16_t rssi_threshold = RSSI_THRESHOLD;
@@ -704,6 +707,13 @@ static int8_t rf_extension(phy_extension_type_e extension_type, uint8_t *data_pt
704707
rf_receive(rf_rx_channel);
705708
}
706709
break;
710+
case PHY_EXTENSION_SET_CHANNEL_CCA_THRESHOLD:
711+
if ((rssi_threshold != (int8_t)*data_ptr) && (rf_state != RF_RX_STARTED)) {
712+
rssi_threshold = (int8_t)*data_ptr; // *NOPAD*
713+
rf_update_cca_threshold = true;
714+
rf_receive(rf_rx_channel);
715+
}
716+
break;
707717
default:
708718
break;
709719
}
@@ -752,9 +762,9 @@ static void rf_tx_sent_handler(void)
752762
TEST_TX_DONE
753763
rf_backup_timer_stop();
754764
rf_disable_interrupt(TX_DATA_SENT);
765+
rf_update_tx_active_time();
755766
if (rf_state != RF_TX_ACK) {
756767
tx_finnish_time = rf_get_timestamp();
757-
rf_update_tx_active_time();
758768
rf_state = RF_IDLE;
759769
rf_receive(rf_rx_channel);
760770
if (device_driver.phy_tx_done_cb) {
@@ -821,7 +831,6 @@ static void rf_cca_timer_interrupt(void)
821831
}
822832
rf_flush_tx_fifo();
823833
tx_finnish_time = rf_get_timestamp();
824-
rf_update_tx_active_time();
825834
if (device_driver.phy_tx_done_cb) {
826835
device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_CCA_FAIL, 0, 0);
827836
}
@@ -955,7 +964,6 @@ static void rf_handle_ack(uint8_t seq_number, uint8_t pending)
955964
phy_link_tx_status_e phy_status;
956965
if (tx_sequence == (uint16_t)seq_number) {
957966
tx_finnish_time = rf_get_timestamp();
958-
rf_update_tx_active_time();
959967
if (pending) {
960968
phy_status = PHY_LINK_TX_DONE_PENDING;
961969
} else {
@@ -1047,6 +1055,12 @@ static void rf_receive(uint8_t rx_channel)
10471055
rf_update_config = false;
10481056
rf_set_channel_configuration_registers();
10491057
}
1058+
if (rf_update_cca_threshold == true) {
1059+
rf_update_cca_threshold = false;
1060+
uint8_t rssi_th;
1061+
rf_conf_calculate_rssi_threshold_registers(rssi_threshold, &rssi_th);
1062+
rf_write_register(RSSI_TH, rssi_th);
1063+
}
10501064
if (rx_channel != rf_rx_channel) {
10511065
rf_write_register(CHNUM, rx_channel * rf_channel_multiplier);
10521066
rf_rx_channel = rf_new_channel = rx_channel;
@@ -1280,7 +1294,9 @@ int8_t NanostackRfPhys2lp::rf_register()
12801294
}
12811295

12821296
rf = _rf;
1297+
#ifdef TEST_GPIOS_ENABLED
12831298
test_pins = _test_pins;
1299+
#endif
12841300

12851301
int8_t radio_id = rf_device_register(_mac_addr);
12861302
if (radio_id < 0) {
@@ -1303,18 +1319,18 @@ void NanostackRfPhys2lp::rf_unregister()
13031319
}
13041320

13051321
NanostackRfPhys2lp::NanostackRfPhys2lp(PinName spi_sdi, PinName spi_sdo, PinName spi_sclk, PinName spi_cs, PinName spi_sdn
1306-
,PinName spi_gpio0, PinName spi_gpio1, PinName spi_gpio2, PinName spi_gpio3
1322+
, PinName spi_gpio0, PinName spi_gpio1, PinName spi_gpio2, PinName spi_gpio3
13071323
#ifdef AT24MAC
1308-
,PinName i2c_sda, PinName i2c_scl
1324+
, PinName i2c_sda, PinName i2c_scl
13091325
#endif //AT24MAC
1310-
)
1326+
)
13111327
:
13121328
#ifdef AT24MAC
1313-
_mac(i2c_sda, i2c_scl),
1329+
_mac(i2c_sda, i2c_scl),
13141330
#endif //AT24MAC
1315-
_mac_addr(), _rf(NULL), _mac_set(false),
1316-
_spi_sdi(spi_sdi), _spi_sdo(spi_sdo), _spi_sclk(spi_sclk), _spi_cs(spi_cs), _spi_sdn(spi_sdn),
1317-
_spi_gpio0(spi_gpio0), _spi_gpio1(spi_gpio1), _spi_gpio2(spi_gpio2), _spi_gpio3(spi_gpio3)
1331+
_mac_addr(), _rf(NULL), _mac_set(false),
1332+
_spi_sdi(spi_sdi), _spi_sdo(spi_sdo), _spi_sclk(spi_sclk), _spi_cs(spi_cs), _spi_sdn(spi_sdn),
1333+
_spi_gpio0(spi_gpio0), _spi_gpio1(spi_gpio1), _spi_gpio2(spi_gpio2), _spi_gpio3(spi_gpio3)
13181334
{
13191335
_rf = new RFPins(_spi_sdi, _spi_sdo, _spi_sclk, _spi_cs, _spi_sdn, _spi_gpio0, _spi_gpio1, _spi_gpio2, _spi_gpio3);
13201336
#ifdef TEST_GPIOS_ENABLED
@@ -1424,11 +1440,11 @@ static bool rf_rx_filter(uint8_t *mac_header, uint8_t *mac_64bit_addr, uint8_t *
14241440
NanostackRfPhy &NanostackRfPhy::get_default_instance()
14251441
{
14261442
static NanostackRfPhys2lp rf_phy(S2LP_SPI_SDI, S2LP_SPI_SDO, S2LP_SPI_SCLK, S2LP_SPI_CS, S2LP_SPI_SDN
1427-
,S2LP_SPI_GPIO0, S2LP_SPI_GPIO1, S2LP_SPI_GPIO2, S2LP_SPI_GPIO3
1443+
, S2LP_SPI_GPIO0, S2LP_SPI_GPIO1, S2LP_SPI_GPIO2, S2LP_SPI_GPIO3
14281444
#ifdef AT24MAC
1429-
,S2LP_I2C_SDA, S2LP_I2C_SCL
1445+
, S2LP_I2C_SDA, S2LP_I2C_SCL
14301446
#endif //AT24MAC
1431-
);
1447+
);
14321448
return rf_phy;
14331449
}
14341450
#endif // MBED_CONF_S2LP_PROVIDE_DEFAULT

‎components/802.15.4_RF/stm-s2lp-rf-driver/source/rf_configuration.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -157,7 +157,7 @@ void rf_conf_calculate_rx_filter_bandwidth_registers(uint32_t rx_bandwidth, uint
157157

158158
int16_t rf_conf_cca_threshold_percent_to_rssi(uint8_t percent)
159159
{
160-
uint8_t step = (MAX_RSSI_THRESHOLD-MIN_RSSI_THRESHOLD);
160+
uint8_t step = (MAX_RSSI_THRESHOLD - MIN_RSSI_THRESHOLD);
161161
return MIN_RSSI_THRESHOLD + (step * percent) / 100;
162162
}
163163

‎components/802.15.4_RF/stm-s2lp-rf-driver/stm-s2lp-rf-driver/NanostackRfPhys2lp.h‎

Lines changed: 81 additions & 68 deletions
Original file line numberDiff line numberDiff line change
@@ -25,87 +25,100 @@
2525
#include "InterruptIn.h"
2626
#include "SPI.h"
2727

28-
// Uncomment to use testing gpios attached to TX/RX processes
29-
// #define TEST_GPIOS_ENABLED
30-
31-
#if defined(TARGET_MTB_STM_S2LP)
32-
#if !defined(S2LP_SPI_SDI)
33-
#define S2LP_SPI_SDI PA_7
34-
#endif
35-
#if !defined(S2LP_SPI_SDO)
36-
#define S2LP_SPI_SDO PA_6
37-
#endif
38-
#if !defined(S2LP_SPI_SCLK)
39-
#define S2LP_SPI_SCLK PA_5
40-
#endif
41-
#if !defined(S2LP_SPI_CS)
42-
#define S2LP_SPI_CS PC_0
43-
#endif
44-
#if !defined(S2LP_SPI_SDN)
45-
#define S2LP_SPI_SDN PF_13
46-
#endif
47-
#if !defined(S2LP_SPI_GPIO0)
48-
#define S2LP_SPI_GPIO0 PA_3
49-
#endif
50-
#if !defined(S2LP_SPI_GPIO1)
51-
#define S2LP_SPI_GPIO1 PC_3
52-
#endif
53-
#if !defined(S2LP_SPI_GPIO2)
54-
#define S2LP_SPI_GPIO2 PF_3
55-
#endif
56-
#if !defined(S2LP_SPI_GPIO3)
57-
#define S2LP_SPI_GPIO3 PF_10
58-
#endif
59-
#if !defined(S2LP_I2C_SDA)
60-
#define S2LP_I2C_SDA PB_7
61-
#endif
62-
#if !defined(S2LP_I2C_SCL)
63-
#define S2LP_I2C_SCL PB_6
28+
#if defined(MBED_CONF_S2LP_SPI_SDI)
29+
#define S2LP_SPI_SDI MBED_CONF_S2LP_SPI_SDI
30+
#else
31+
#define S2LP_SPI_SDI D11
6432
#endif
65-
#define AT24MAC
33+
34+
#if defined(MBED_CONF_S2LP_SPI_SDO)
35+
#define S2LP_SPI_SDO MBED_CONF_S2LP_SPI_SDO
6636
#else
67-
#if !defined(S2LP_SPI_SDI)
68-
#define S2LP_SPI_SDI D11
37+
#define S2LP_SPI_SDO D12
6938
#endif
70-
#if !defined(S2LP_SPI_SDO)
71-
#define S2LP_SPI_SDO D12
39+
40+
#if defined(MBED_CONF_S2LP_SPI_SCLK)
41+
#define S2LP_SPI_SCLK MBED_CONF_S2LP_SPI_SCLK
42+
#else
43+
#define S2LP_SPI_SCLK D13
7244
#endif
73-
#if !defined(S2LP_SPI_SCLK)
74-
#define S2LP_SPI_SCLK D13
45+
46+
#if defined(MBED_CONF_S2LP_SPI_CS)
47+
#define S2LP_SPI_CS MBED_CONF_S2LP_SPI_CS
48+
#else
49+
#define S2LP_SPI_CS A1
7550
#endif
76-
#if !defined(S2LP_SPI_CS)
77-
#define S2LP_SPI_CS A1
51+
52+
#if defined(MBED_CONF_S2LP_SPI_SDN)
53+
#define S2LP_SPI_SDN MBED_CONF_S2LP_SPI_SDN
54+
#else
55+
#define S2LP_SPI_SDN D7
7856
#endif
79-
#if !defined(S2LP_SPI_SDN)
80-
#define S2LP_SPI_SDN D7
57+
58+
#if defined(MBED_CONF_S2LP_TEST_PIN_TX)
59+
#define S2LP_TEST_PIN_TX MBED_CONF_S2LP_TEST_PIN_TX
60+
#else
61+
#define S2LP_TEST_PIN_TX D6
8162
#endif
82-
#if !defined(TEST_PIN_TX)
83-
#define TEST_PIN_TX D6
63+
64+
#if defined(MBED_CONF_S2LP_TEST_PIN_RX)
65+
#define S2LP_TEST_PIN_RX MBED_CONF_S2LP_TEST_PIN_RX
66+
#else
67+
#define S2LP_TEST_PIN_RX D5
8468
#endif
85-
#if !defined(TEST_PIN_RX)
86-
#define TEST_PIN_RX D5
69+
70+
#if defined(MBED_CONF_S2LP_TEST_PIN_CSMA)
71+
#define S2LP_TEST_PIN_CSMA MBED_CONF_S2LP_TEST_PIN_CSMA
72+
#else
73+
#define S2LP_TEST_PIN_CSMA D4
8774
#endif
88-
#if !defined(TEST_PIN_CSMA)
89-
#define TEST_PIN_CSMA D4
75+
76+
#if defined(MBED_CONF_S2LP_TEST_PIN_SPARE_1)
77+
#define S2LP_TEST_PIN_SPARE_1 MBED_CONF_S2LP_TEST_PIN_SPARE_1
78+
#else
79+
#define S2LP_TEST_PIN_SPARE_1 D2
9080
#endif
91-
#if !defined(TEST_PIN_SPARE_1)
92-
#define TEST_PIN_SPARE_1 D2
81+
82+
#if defined(MBED_CONF_S2LP_TEST_PIN_SPARE_2)
83+
#define S2LP_TEST_PIN_SPARE_2 MBED_CONF_S2LP_TEST_PIN_SPARE_2
84+
#else
85+
#define S2LP_TEST_PIN_SPARE_2 D8
9386
#endif
94-
#if !defined(TEST_PIN_SPARE_2)
95-
#define TEST_PIN_SPARE_2 D8
87+
88+
#if defined(MBED_CONF_S2LP_SPI_GPIO0)
89+
#define S2LP_SPI_GPIO0 MBED_CONF_S2LP_SPI_GPIO0
90+
#else
91+
#define S2LP_SPI_GPIO0 A0
9692
#endif
97-
#if !defined(S2LP_SPI_GPIO0)
98-
#define S2LP_SPI_GPIO0 A0
93+
94+
#if defined(MBED_CONF_S2LP_SPI_GPIO1)
95+
#define S2LP_SPI_GPIO1 MBED_CONF_S2LP_SPI_GPIO1
96+
#else
97+
#define S2LP_SPI_GPIO1 A2
9998
#endif
100-
#if !defined(S2LP_SPI_GPIO1)
101-
#define S2LP_SPI_GPIO1 A2
99+
100+
#if defined(MBED_CONF_S2LP_SPI_GPIO2)
101+
#define S2LP_SPI_GPIO2 MBED_CONF_S2LP_SPI_GPIO2
102+
#else
103+
#define S2LP_SPI_GPIO2 A3
102104
#endif
103-
#if !defined(S2LP_SPI_GPIO2)
104-
#define S2LP_SPI_GPIO2 A3
105+
106+
#if defined(MBED_CONF_S2LP_SPI_GPIO3)
107+
#define S2LP_SPI_GPIO3 MBED_CONF_S2LP_SPI_GPIO3
108+
#else
109+
#define S2LP_SPI_GPIO3 A5
105110
#endif
106-
#if !defined(S2LP_SPI_GPIO3)
107-
#define S2LP_SPI_GPIO3 A5
111+
112+
#if defined(MBED_CONF_S2LP_I2C_SDA)
113+
#define S2LP_I2C_SDA MBED_CONF_S2LP_I2C_SDA
114+
#else
115+
#define S2LP_I2C_SDA null
108116
#endif
117+
118+
#if defined(MBED_CONF_S2LP_I2C_SCL)
119+
#define S2LP_I2C_SCL MBED_CONF_S2LP_I2C_SCL
120+
#else
121+
#define S2LP_I2C_SCL null
109122
#endif
110123

111124
#include "at24mac_s2lp.h"
@@ -116,11 +129,11 @@ class TestPins_S2LP;
116129
class NanostackRfPhys2lp : public NanostackRfPhy {
117130
public:
118131
NanostackRfPhys2lp(PinName spi_sdi, PinName spi_sdo, PinName spi_sclk, PinName spi_cs, PinName spi_sdn
119-
,PinName spi_gpio0, PinName spi_gpio1, PinName spi_gpio2, PinName spi_gpio3
132+
, PinName spi_gpio0, PinName spi_gpio1, PinName spi_gpio2, PinName spi_gpio3
120133
#ifdef AT24MAC
121-
,PinName i2c_sda, PinName i2c_scl
134+
, PinName i2c_sda, PinName i2c_scl
122135
#endif //AT24MAC
123-
);
136+
);
124137
virtual ~NanostackRfPhys2lp();
125138
virtual int8_t rf_register();
126139
virtual void rf_unregister();

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