@@ -49,29 +49,29 @@ using namespace rtos;
4949#endif
5050
5151#ifdef TEST_GPIOS_ENABLED
52- #define TEST_TX_STARTED rf ->TEST1 = 1 ;
53- #define TEST_TX_DONE rf ->TEST1 = 0 ;
54- #define TEST_RX_STARTED rf ->TEST2 = 1 ;
55- #define TEST_RX_DONE rf ->TEST2 = 0 ;
56- #define TEST_ACK_TX_STARTED rf ->TEST3 = 1 ;
57- #define TEST_ACK_TX_DONE rf ->TEST3 = 0 ;
58- #define TEST1_ON rf ->TEST4 = 1 ;
59- #define TEST1_OFF rf ->TEST4 = 0 ;
60- #define TEST2_ON rf ->TEST5 = 1 ;
61- #define TEST2_OFF rf ->TEST5 = 0 ;
52+ #define TEST_TX_STARTED test_pins ->TEST1 = 1 ;
53+ #define TEST_TX_DONE test_pins ->TEST1 = 0 ;
54+ #define TEST_RX_STARTED test_pins ->TEST2 = 1 ;
55+ #define TEST_RX_DONE test_pins ->TEST2 = 0 ;
56+ #define TEST_CSMA_STARTED test_pins ->TEST3 = 1 ;
57+ #define TEST_CSMA_DONE test_pins ->TEST3 = 0 ;
58+ #define TEST_SPARE_1_ON test_pins ->TEST4 = 1 ;
59+ #define TEST_SPARE_1_OFF test_pins ->TEST4 = 0 ;
60+ #define TEST_SPARE_2_ON test_pins ->TEST5 = 1 ;
61+ #define TEST_SPARE_2_OFF test_pins ->TEST5 = 0 ;
6262extern void (*fhss_uc_switch)(void );
6363extern void (*fhss_bc_switch)(void );
6464#else // TEST_GPIOS_ENABLED
6565#define TEST_TX_STARTED
6666#define TEST_TX_DONE
6767#define TEST_RX_STARTED
6868#define TEST_RX_DONE
69- #define TEST_ACK_TX_STARTED
70- #define TEST_ACK_TX_DONE
71- #define TEST1_ON
72- #define TEST1_OFF
73- #define TEST2_ON
74- #define TEST2_OFF
69+ #define TEST_CSMA_STARTED
70+ #define TEST_CSMA_DONE
71+ #define TEST_SPARE_1_ON
72+ #define TEST_SPARE_1_OFF
73+ #define TEST_SPARE_2_ON
74+ #define TEST_SPARE_2_OFF
7575#endif // TEST_GPIOS_ENABLED
7676
7777#define MAC_FRAME_TYPE_MASK 0x07
@@ -116,21 +116,11 @@ class RFPins {
116116public:
117117 RFPins (PinName spi_sdi, PinName spi_sdo,
118118 PinName spi_sclk, PinName spi_cs, PinName spi_sdn,
119- #ifdef TEST_GPIOS_ENABLED
120- PinName spi_test1, PinName spi_test2, PinName spi_test3, PinName spi_test4, PinName spi_test5,
121- #endif // TEST_GPIOS_ENABLED
122119 PinName spi_gpio0, PinName spi_gpio1, PinName spi_gpio2,
123120 PinName spi_gpio3);
124121 UnlockedSPI spi;
125122 DigitalOut CS;
126123 DigitalOut SDN;
127- #ifdef TEST_GPIOS_ENABLED
128- DigitalOut TEST1;
129- DigitalOut TEST2;
130- DigitalOut TEST3;
131- DigitalOut TEST4;
132- DigitalOut TEST5;
133- #endif // TEST_GPIOS_ENABLED
134124 InterruptIn RF_S2LP_GPIO0;
135125 InterruptIn RF_S2LP_GPIO1;
136126 InterruptIn RF_S2LP_GPIO2;
@@ -145,21 +135,11 @@ class RFPins {
145135
146136RFPins::RFPins (PinName spi_sdi, PinName spi_sdo,
147137 PinName spi_sclk, PinName spi_cs, PinName spi_sdn,
148- #ifdef TEST_GPIOS_ENABLED
149- PinName spi_test1, PinName spi_test2, PinName spi_test3, PinName spi_test4, PinName spi_test5,
150- #endif // TEST_GPIOS_ENABLED
151138 PinName spi_gpio0, PinName spi_gpio1, PinName spi_gpio2,
152139 PinName spi_gpio3)
153140 : spi(spi_sdi, spi_sdo, spi_sclk),
154141 CS(spi_cs),
155142 SDN(spi_sdn),
156- #ifdef TEST_GPIOS_ENABLED
157- TEST1 (spi_test1),
158- TEST2(spi_test2),
159- TEST3(spi_test3),
160- TEST4(spi_test4),
161- TEST5(spi_test5),
162- #endif // TEST_GPIOS_ENABLED
163143 RF_S2LP_GPIO0(spi_gpio0),
164144 RF_S2LP_GPIO1(spi_gpio1),
165145 RF_S2LP_GPIO2(spi_gpio2),
@@ -169,6 +149,25 @@ RFPins::RFPins(PinName spi_sdi, PinName spi_sdo,
169149 irq_thread.start (mbed::callback (this , &RFPins::rf_irq_task));
170150}
171151
152+ class TestPins_S2LP {
153+ public:
154+ TestPins_S2LP (PinName test_pin_1, PinName test_pin_2, PinName test_pin_3, PinName test_pin_4, PinName test_pin_5);
155+ DigitalOut TEST1;
156+ DigitalOut TEST2;
157+ DigitalOut TEST3;
158+ DigitalOut TEST4;
159+ DigitalOut TEST5;
160+ };
161+
162+ TestPins_S2LP::TestPins_S2LP (PinName test_pin_1, PinName test_pin_2, PinName test_pin_3, PinName test_pin_4, PinName test_pin_5)
163+ : TEST1(test_pin_1),
164+ TEST2(test_pin_2),
165+ TEST3(test_pin_3),
166+ TEST4(test_pin_4),
167+ TEST5(test_pin_5)
168+ {
169+ }
170+
172171static uint8_t rf_read_register (uint8_t addr);
173172static s2lp_states_e rf_read_state (void );
174173static void rf_write_register (uint8_t addr, uint8_t data);
@@ -183,6 +182,7 @@ static bool rf_rx_filter(uint8_t *mac_header, uint8_t *mac_64bit_addr, uint8_t *
183182static void rf_cca_timer_start (uint32_t slots);
184183
185184static RFPins *rf;
185+ static TestPins_S2LP *test_pins;
186186static phy_device_driver_s device_driver;
187187static int8_t rf_radio_driver_id = -1 ;
188188static uint8_t *tx_data_ptr;
@@ -246,20 +246,20 @@ static void rf_irq_task_process_irq();
246246#define ACK_SENDING_TIME (uint32_t )(8000000 /phy_subghz.datarate)*ACK_FRAME_LENGTH + PACKET_SENDING_EXTRA_TIME
247247
248248#ifdef TEST_GPIOS_ENABLED
249- void test1_toggle (void )
249+ static void test1_toggle (void )
250250{
251- if (rf ->TEST4 ) {
252- rf ->TEST4 = 0 ;
251+ if (test_pins ->TEST4 ) {
252+ test_pins ->TEST4 = 0 ;
253253 } else {
254- rf ->TEST4 = 1 ;
254+ test_pins ->TEST4 = 1 ;
255255 }
256256}
257- void test2_toggle (void )
257+ static void test2_toggle (void )
258258{
259- if (rf ->TEST5 ) {
260- rf ->TEST5 = 0 ;
259+ if (test_pins ->TEST5 ) {
260+ test_pins ->TEST5 = 0 ;
261261 } else {
262- rf ->TEST5 = 1 ;
262+ test_pins ->TEST5 = 1 ;
263263 }
264264}
265265#endif // TEST_GPIOS_ENABLED
@@ -749,19 +749,18 @@ static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_
749749
750750static void rf_tx_sent_handler (void )
751751{
752+ TEST_TX_DONE
752753 rf_backup_timer_stop ();
753754 rf_disable_interrupt (TX_DATA_SENT);
754755 if (rf_state != RF_TX_ACK) {
755756 tx_finnish_time = rf_get_timestamp ();
756757 rf_update_tx_active_time ();
757- TEST_TX_DONE
758758 rf_state = RF_IDLE;
759759 rf_receive (rf_rx_channel);
760760 if (device_driver.phy_tx_done_cb ) {
761761 device_driver.phy_tx_done_cb (rf_radio_driver_id, mac_tx_handle, PHY_LINK_TX_SUCCESS, 0 , 0 );
762762 }
763763 } else {
764- TEST_ACK_TX_DONE
765764 rf_receive (rf_rx_channel);
766765 }
767766}
@@ -807,6 +806,7 @@ static int rf_cca_check(void)
807806
808807static void rf_cca_timer_interrupt (void )
809808{
809+ TEST_CSMA_DONE
810810 int8_t status = device_driver.phy_tx_done_cb (rf_radio_driver_id, mac_tx_handle, PHY_LINK_CCA_PREPARE, 0 , 0 );
811811 if (status == PHY_TX_NOT_ALLOWED) {
812812 rf_flush_tx_fifo ();
@@ -851,12 +851,14 @@ static void rf_cca_timer_interrupt(void)
851851
852852static void rf_cca_timer_stop (void )
853853{
854+ TEST_CSMA_DONE
854855 rf->cca_timer .detach ();
855856}
856857
857858static void rf_cca_timer_start (uint32_t slots)
858859{
859860 rf->cca_timer .attach_us (rf_cca_timer_signal, slots);
861+ TEST_CSMA_STARTED
860862}
861863
862864static void rf_backup_timer_interrupt (void )
@@ -941,7 +943,7 @@ static void rf_send_ack(uint8_t seq)
941943 rf_write_packet_length (sizeof (ack_frame) + 4 );
942944 tx_data_ptr = NULL ;
943945 rf_start_tx ();
944- TEST_ACK_TX_STARTED
946+ TEST_TX_STARTED
945947 rf_backup_timer_start (ACK_SENDING_TIME);
946948 if (device_driver.phy_rf_statistics ) {
947949 device_driver.phy_rf_statistics ->tx_bytes += sizeof (ack_frame);
@@ -1278,6 +1280,7 @@ int8_t NanostackRfPhys2lp::rf_register()
12781280 }
12791281
12801282 rf = _rf;
1283+ test_pins = _test_pins;
12811284
12821285 int8_t radio_id = rf_device_register (_mac_addr);
12831286 if (radio_id < 0 ) {
@@ -1300,9 +1303,6 @@ void NanostackRfPhys2lp::rf_unregister()
13001303}
13011304
13021305NanostackRfPhys2lp::NanostackRfPhys2lp (PinName spi_sdi, PinName spi_sdo, PinName spi_sclk, PinName spi_cs, PinName spi_sdn
1303- #ifdef TEST_GPIOS_ENABLED
1304- ,PinName spi_test1, PinName spi_test2, PinName spi_test3, PinName spi_test4, PinName spi_test5
1305- #endif // TEST_GPIOS_ENABLED
13061306 ,PinName spi_gpio0, PinName spi_gpio1, PinName spi_gpio2, PinName spi_gpio3
13071307#ifdef AT24MAC
13081308 ,PinName i2c_sda, PinName i2c_scl
@@ -1314,16 +1314,12 @@ NanostackRfPhys2lp::NanostackRfPhys2lp(PinName spi_sdi, PinName spi_sdo, PinName
13141314#endif // AT24MAC
13151315 _mac_addr (), _rf(NULL ), _mac_set(false ),
13161316 _spi_sdi(spi_sdi), _spi_sdo(spi_sdo), _spi_sclk(spi_sclk), _spi_cs(spi_cs), _spi_sdn(spi_sdn),
1317- #ifdef TEST_GPIOS_ENABLED
1318- _spi_test1 (spi_test1), _spi_test2(spi_test2), _spi_test3(spi_test3), _spi_test4(spi_test4), _spi_test5(spi_test5),
1319- #endif // TEST_GPIOS_ENABLED
13201317 _spi_gpio0(spi_gpio0), _spi_gpio1(spi_gpio1), _spi_gpio2(spi_gpio2), _spi_gpio3(spi_gpio3)
13211318{
1322- _rf = new RFPins (_spi_sdi, _spi_sdo, _spi_sclk, _spi_cs, _spi_sdn,
1319+ _rf = new RFPins (_spi_sdi, _spi_sdo, _spi_sclk, _spi_cs, _spi_sdn, _spi_gpio0, _spi_gpio1, _spi_gpio2, _spi_gpio3);
13231320#ifdef TEST_GPIOS_ENABLED
1324- _spi_test1, _spi_test2, _spi_test3, _spi_test4, _spi_test5,
1321+ _test_pins = new TestPins_S2LP (TEST_PIN_TX, TEST_PIN_RX, TEST_PIN_CSMA, TEST_PIN_SPARE_1, TEST_PIN_SPARE_2);
13251322#endif // TEST_GPIOS_ENABLED
1326- _spi_gpio0, _spi_gpio1, _spi_gpio2, _spi_gpio3);
13271323}
13281324
13291325NanostackRfPhys2lp::~NanostackRfPhys2lp ()
@@ -1428,9 +1424,6 @@ static bool rf_rx_filter(uint8_t *mac_header, uint8_t *mac_64bit_addr, uint8_t *
14281424NanostackRfPhy &NanostackRfPhy::get_default_instance ()
14291425{
14301426 static NanostackRfPhys2lp rf_phy (S2LP_SPI_SDI, S2LP_SPI_SDO, S2LP_SPI_SCLK, S2LP_SPI_CS, S2LP_SPI_SDN
1431- #ifdef TEST_GPIOS_ENABLED
1432- ,S2LP_SPI_TEST1, S2LP_SPI_TEST2, S2LP_SPI_TEST3, S2LP_SPI_TEST4, S2LP_SPI_TEST5
1433- #endif // TEST_GPIOS_ENABLED
14341427 ,S2LP_SPI_GPIO0, S2LP_SPI_GPIO1, S2LP_SPI_GPIO2, S2LP_SPI_GPIO3
14351428#ifdef AT24MAC
14361429 ,S2LP_I2C_SDA, S2LP_I2C_SCL
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