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Merge pull request #12422 from dustin-crossman/pr/cy_asset_update_2-7-20
Cypress Asset Update
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‎targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/core_lib/include/cy_result.h‎

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*
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********************************************************************************
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* \copyright
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* Copyright 2018-2019 Cypress Semiconductor Corporation
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* Copyright 2018-2020 Cypress Semiconductor Corporation
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
@@ -69,7 +69,7 @@ typedef uint32_t cy_rslt_t;
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/** \cond INTERNAL */
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/** Mask for the bit at position "x" */
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#define CY_BIT_MASK(x) ((1U << (x)) - 1U)
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#define CY_BIT_MASK(x) ((1UL << (x)) - 1U)
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/** Bit position of the result type */
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#define CY_RSLT_TYPE_POSITION (16U)

‎targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/core_lib/include/cy_utils.h‎

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*
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********************************************************************************
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* \copyright
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* Copyright 2018-2019 Cypress Semiconductor Corporation
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* Copyright 2018-2020 Cypress Semiconductor Corporation
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");

‎targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/core_lib/version.xml‎

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<version>1.1.1.11109</version>

‎targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/hal/include/cyhal.h‎

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*
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********************************************************************************
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* \copyright
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* Copyright 2018-2019 Cypress Semiconductor Corporation
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* Copyright 2018-2020 Cypress Semiconductor Corporation
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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*******************************************************************************/
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/**
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* \defgroup group_hal HAL Drivers
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* \addtogroup group_hal HAL Drivers
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* This section documents the drivers which form the stable API of the Cypress HAL.
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* In order to remain portable across platforms and HAL versions, applications should
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* rely only on functionality documented in this section.
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* \{
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* \defgroup group_result Result Type
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* \}
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*/
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#pragma once
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#include "cyhal_adc.h"
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#include "cyhal_crc.h"
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#include "cyhal_dac.h"
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#include "cyhal_dma.h"
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#include "cyhal_flash.h"
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#include "cyhal_gpio.h"
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#include "cyhal_hwmgr.h"
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#include "cyhal_i2c.h"
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#include "cyhal_ezi2c.h"
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#include "cyhal_interconnect.h"
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#include "cyhal_lptimer.h"
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#include "cyhal_pwm.h"

‎targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/hal/include/cyhal_adc.h‎

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*
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********************************************************************************
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* \copyright
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* Copyright 2018-2019 Cypress Semiconductor Corporation
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* Copyright 2018-2020 Cypress Semiconductor Corporation
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* \addtogroup group_hal_adc ADC (Analog to Digital Converter)
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* \ingroup group_hal
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* \{
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* High level interface for interacting with the Cypress ADC.
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* High level interface for interacting with the analog to digital converter (ADC).
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*
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* Each ADC instance supports one or more selectable channels, each
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* of which can perform conversions on a different pin.
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* See the device datasheet for details about which pins support ADC conversion.
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*
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* In order to use the ADC, first call cyhal_adc_init to initialize an ADC instance.
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* Then call cyhal_adc_channel_init to initialize one or more channels associated with
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* that instance.
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*
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* All channels are single-ended.
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* The values returned by the read API are relative to the ADC's voltage range, which
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* is device specific.
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*
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* \defgroup group_hal_adc_common Common
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* \defgroup group_hal_adc_functions ADC Functions
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* \defgroup group_hal_adc_channel_functions ADC Channel Functions
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*/
@@ -59,12 +72,6 @@ extern "C" {
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/** No channels available */
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#define CYHAL_ADC_RSLT_NO_CHANNELS (CY_RSLT_CREATE(CY_RSLT_TYPE_ERROR, CYHAL_RSLT_MODULE_ADC, 3))
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/**
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* \addtogroup group_hal_adc_functions
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* \{
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*/
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/** Initialize ADC peripheral
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*
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* @param[out] obj The adc object to initialize
@@ -84,13 +91,6 @@ cy_rslt_t cyhal_adc_init(cyhal_adc_t *obj, cyhal_gpio_t pin, const cyhal_clock_d
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*/
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void cyhal_adc_free(cyhal_adc_t *obj);
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/** \} group_hal_adc_functions */
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/**
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* \addtogroup group_hal_adc_channel_functions
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* \{
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*/
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/** Initialize a single-ended ADC channel.
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*
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* Configures the pin used by ADC.
@@ -116,8 +116,6 @@ void cyhal_adc_channel_free(cyhal_adc_channel_t *obj);
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*/
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uint16_t cyhal_adc_read_u16(const cyhal_adc_channel_t *obj);
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/** \} group_hal_adc_channel_functions */
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#if defined(__cplusplus)
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}
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#endif

‎targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/hal/include/cyhal_analog_common.h‎

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*
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********************************************************************************
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* \copyright
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* Copyright 2018-2019 Cypress Semiconductor Corporation
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* Copyright 2018-2020 Cypress Semiconductor Corporation
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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extern "C" {
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#endif
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/**
32+
/**
3333
* Initialize the programmable analog. This utilizes reference counting to avoid
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* repeatedly initializing the analog subsystem when multiple analog blocks are in use
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* */
3636
void cyhal_analog_init();
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/**
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/**
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* Uninitialize the programmable analog. This utilizes reference counting to avoid
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* disabling the analog subsystem until all blocks which require it have been freed.
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*/

‎targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/hal/include/cyhal_crc.h‎

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* \file cyhal_crc.h
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*
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* \brief
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* Provides a high level interface for interacting with the Cypress CRC accelerator.
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* Provides a high level interface for interacting with the Cypress CRC accelerator.
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* This interface abstracts out the chip specific details. If any chip specific
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* functionality is necessary, or performance is critical the low level functions
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* can be used directly.
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*
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********************************************************************************
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* \copyright
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* Copyright 2018-2019 Cypress Semiconductor Corporation
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* Copyright 2018-2020 Cypress Semiconductor Corporation
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* \addtogroup group_hal_crc CRC (Cyclic Redundancy Check)
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* \ingroup group_hal
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* \{
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* High level interface for interacting with the Cypress CRC.
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* High level interface for interacting with the cyclic redundancy check (CRC), which provides hardware
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* accelerated CRC computations.
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* The CRC APIs are structured to enable usage in situations where the entire input data
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* set is not available in memory at one time. Therefore, each conversion consists of three steps:
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* * A single call to cyhal_crc_start, to initialize data structures for this computation
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* * One or more calls to cyhal_crc_compute, to provide chunks of data.
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* * A single call to cyhal_crc_finish, to finalize the computation and retrieve the result.
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*
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* Many of the algorithm parameters can be customized; see crc_algorithm_t for more details.
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*/
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#pragma once

‎targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/hal/include/cyhal_crc_impl.h‎

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/***************************************************************************//**
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/***************************************************************************//**
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* \file cyhal_crc_impl.h
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*
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* Description:
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* Provides a high level interface for interacting with the Cypress CRC accelerator.
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* Provides a high level interface for interacting with the Cypress CRC accelerator.
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* This is a wrapper around the lower level PDL API.
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*
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********************************************************************************
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* \copyright
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* Copyright 2018-2019 Cypress Semiconductor Corporation
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* Copyright 2018-2020 Cypress Semiconductor Corporation
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");

‎targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/hal/include/cyhal_crypto_common.h‎

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* \file cyhal_crypto_common.h
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*
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* Description:
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* This file provides common defines, addresses, and functions required by drivers
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* This file provides common defines, addresses, and functions required by drivers
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* using the Crypto block.
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*
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********************************************************************************
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* \copyright
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* Copyright 2018-2019 Cypress Semiconductor Corporation
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* Copyright 2018-2020 Cypress Semiconductor Corporation
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");

‎targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/hal/include/cyhal_dac.h‎

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*
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********************************************************************************
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* \copyright
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* Copyright 2018-2019 Cypress Semiconductor Corporation
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* Copyright 2018-2020 Cypress Semiconductor Corporation
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* \addtogroup group_hal_dac DAC (Digital to Analog Converter)
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* \ingroup group_hal
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* \{
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* High level interface for interacting with the Cypress DAC.
32+
* High level interface for interacting with the digital to analog converter (DAC).
3333
*
34+
* This block drives a pin with a firmware configurable voltage. See the device datasheet
35+
* for details on which pins support DAC output.
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*
37+
* The cyhal_dac_write and cyhal_dac_read APIs are defined relative to the DAC's output
38+
* voltage range, which is device dependent.
3439
*/
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#pragma once

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